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Commit a63d2070 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add gpi ee offset node for GSI driver"

parents 10810d21 a49b5ad2

bindings/dma/qcom_gpi.txt

+3 −3
Original line number Diff line number Diff line
@@ -80,10 +80,10 @@ Main node properties: 
  Definition: Pair of values describing iova base and size to allocate.



Optional property:

- qcom,gpii_offset

- qcom,gpi-ee-offset

  Usage: optional

  Value type: boolean

  Definition: Flag to enable support for variable gpii register offsets among QUPs.

  Value type: u64

  Definition: Specifies the gsi ee register offset for the QUP.



========

Example:

qcom/kona.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -4701,7 +4701,7 @@ 
		qcom,max-num-gpii = <15>;

		qcom,gpii-mask = <0x7ff>;

		qcom,ev-factor = <2>;

		qcom,gpii_offset;

		qcom,gpi-ee-offset = <0x1000>;

		iommus = <&apps_smmu 0x5b6 0x0>;

		qcom,smmu-cfg = <0x1>;

		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
@@ -4726,7 +4726,7 @@ 
		qcom,max-num-gpii = <10>;

		qcom,gpii-mask = <0x3f>;

		qcom,ev-factor = <2>;

		qcom,gpii_offset;

		qcom,gpi-ee-offset = <0x6000>;

		iommus = <&apps_smmu 0x56 0x0>;

		qcom,smmu-cfg = <0x1>;

		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
@@ -4751,7 +4751,7 @@ 
		qcom,max-num-gpii = <10>;

		qcom,gpii-mask = <0x3f>;

		qcom,ev-factor = <2>;

		qcom,gpii_offset;

		qcom,gpi-ee-offset = <0x6000>;

		iommus = <&apps_smmu 0x76 0x0>;

		qcom,smmu-cfg = <0x1>;

		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;

qcom/lito.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -3028,6 +3028,7 @@ 
		qcom,max-num-gpii = <10>;

		qcom,gpii-mask = <0x1f>;

		qcom,ev-factor = <2>;

		qcom,gpi-ee-offset = <0x10000>;

		iommus = <&apps_smmu 0x4f6 0x0>;

		qcom,smmu-cfg = <0x1>;

		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
@@ -3052,6 +3053,7 @@ 
		qcom,max-num-gpii = <10>;

		qcom,gpii-mask = <0x3f>;

		qcom,ev-factor = <2>;

		qcom,gpi-ee-offset = <0x10000>;

		iommus = <&apps_smmu 0x36 0x0>;

		qcom,smmu-cfg = <0x1>;

		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;