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Commit a5733139 authored by Tadeusz Struk's avatar Tadeusz Struk Committed by Herbert Xu
Browse files

crypto: qat - Move adf admin and adf hw arbitrer to common code 



Adf admin and HW arbiter function can be used by dh895xcc specific code
well as the new dh895xccvf and future devices so moving them to
qat_common so that they can be shared.

Signed-off-by: default avatarTadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 104880a6

drivers/crypto/qat/qat_common/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ intel_qat-objs := adf_cfg.o \ 
	adf_accel_engine.o \

	adf_aer.o \

	adf_transport.o \

	adf_admin.o \

	adf_hw_arbiter.o \

	qat_crypto.o \

	qat_algs.o \

	qat_rsakey-asn1.o \

drivers/crypto/qat/qat_common/adf_accel_devices.h

+3 −2
Original line number Diff line number Diff line
@@ -141,15 +141,16 @@ struct adf_hw_device_data { 
	uint32_t (*get_num_aes)(struct adf_hw_device_data *self);

	uint32_t (*get_num_accels)(struct adf_hw_device_data *self);

	enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self);

	void (*hw_arb_ring_enable)(struct adf_etr_ring_data *ring);

	void (*hw_arb_ring_disable)(struct adf_etr_ring_data *ring);

	int (*alloc_irq)(struct adf_accel_dev *accel_dev);

	void (*free_irq)(struct adf_accel_dev *accel_dev);

	void (*enable_error_correction)(struct adf_accel_dev *accel_dev);

	int (*init_admin_comms)(struct adf_accel_dev *accel_dev);

	void (*exit_admin_comms)(struct adf_accel_dev *accel_dev);

	int (*send_admin_init)(struct adf_accel_dev *accel_dev);

	int (*init_arb)(struct adf_accel_dev *accel_dev);

	void (*exit_arb)(struct adf_accel_dev *accel_dev);

	void (*get_arb_mapping)(struct adf_accel_dev *accel_dev,

				const uint32_t **cfg);

	void (*enable_ints)(struct adf_accel_dev *accel_dev);

	const char *fw_name;

	const char *fw_mmp_name;

drivers/crypto/qat/qat_dh895xcc/adf_admin.c→drivers/crypto/qat/qat_common/adf_admin.c

+49 −9
Original line number Diff line number Diff line
@@ -50,10 +50,14 @@ 
#include <linux/delay.h>

#include <linux/pci.h>

#include <linux/dma-mapping.h>

#include <adf_accel_devices.h>

#include "adf_drv.h"

#include "adf_dh895xcc_hw_data.h"



#include "adf_accel_devices.h"

#include "icp_qat_fw_init_admin.h"



/* Admin Messages Registers */

#define ADF_DH895XCC_ADMINMSGUR_OFFSET (0x3A000 + 0x574)

#define ADF_DH895XCC_ADMINMSGLR_OFFSET (0x3A000 + 0x578)

#define ADF_DH895XCC_MAILBOX_BASE_OFFSET 0x20970

#define ADF_DH895XCC_MAILBOX_STRIDE 0x1000

#define ADF_ADMINMSG_LEN 32



struct adf_admin_comms {
@@ -63,8 +67,8 @@ struct adf_admin_comms { 
	struct mutex lock;	/* protects adf_admin_comms struct */

};



int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev,

			   uint32_t ae, void *in, void *out)

static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae,

				  void *in, void *out)

{

	struct adf_admin_comms *admin = accel_dev->admin;

	int offset = ae * ADF_ADMINMSG_LEN * 2;
@@ -100,13 +104,47 @@ int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, 
	return received ? 0 : -EFAULT;

}



static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd)

{

	struct adf_hw_device_data *hw_device = accel_dev->hw_device;

	struct icp_qat_fw_init_admin_req req;

	struct icp_qat_fw_init_admin_resp resp;

	int i;



	memset(&req, 0, sizeof(struct icp_qat_fw_init_admin_req));

	req.init_admin_cmd_id = cmd;

	for (i = 0; i < hw_device->get_num_aes(hw_device); i++) {

		memset(&resp, 0, sizeof(struct icp_qat_fw_init_admin_resp));

		if (adf_put_admin_msg_sync(accel_dev, i, &req, &resp) ||

		    resp.init_resp_hdr.status)

			return -EFAULT;

	}

	return 0;

}



/**

 * adf_send_admin_init() - Function sends init message to FW

 * @accel_dev: Pointer to acceleration device.

 *

 * Function sends admin init message to the FW

 *

 * Return: 0 on success, error code otherwise.

 */

int adf_send_admin_init(struct adf_accel_dev *accel_dev)

{

	return adf_send_admin_cmd(accel_dev, ICP_QAT_FW_INIT_ME);

}

EXPORT_SYMBOL_GPL(adf_send_admin_init);



int adf_init_admin_comms(struct adf_accel_dev *accel_dev)

{

	struct adf_admin_comms *admin;

	struct adf_bar *pmisc = &GET_BARS(accel_dev)[ADF_DH895XCC_PMISC_BAR];

	struct adf_hw_device_data *hw_data = accel_dev->hw_device;

	struct adf_bar *pmisc =

		&GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];

	void __iomem *csr = pmisc->virt_addr;

	void __iomem *mailbox = csr + ADF_DH895XCC_MAILBOX_BASE_OFFSET;

	uint64_t reg_val;

	u64 reg_val;



	admin = kzalloc_node(sizeof(*accel_dev->admin), GFP_KERNEL,

			     dev_to_node(&GET_DEV(accel_dev)));
@@ -119,7 +157,7 @@ int adf_init_admin_comms(struct adf_accel_dev *accel_dev) 
		kfree(admin);

		return -ENOMEM;

	}

	reg_val = (uint64_t)admin->phy_addr;

	reg_val = (u64)admin->phy_addr;

	ADF_CSR_WR(csr, ADF_DH895XCC_ADMINMSGUR_OFFSET, reg_val >> 32);

	ADF_CSR_WR(csr, ADF_DH895XCC_ADMINMSGLR_OFFSET, reg_val);

	mutex_init(&admin->lock);
@@ -127,6 +165,7 @@ int adf_init_admin_comms(struct adf_accel_dev *accel_dev) 
	accel_dev->admin = admin;

	return 0;

}

EXPORT_SYMBOL_GPL(adf_init_admin_comms);



void adf_exit_admin_comms(struct adf_accel_dev *accel_dev)

{
@@ -143,3 +182,4 @@ void adf_exit_admin_comms(struct adf_accel_dev *accel_dev) 
	kfree(admin);

	accel_dev->admin = NULL;

}

EXPORT_SYMBOL_GPL(adf_exit_admin_comms);

drivers/crypto/qat/qat_common/adf_common_drv.h

+6 −1
Original line number Diff line number Diff line
@@ -91,7 +91,6 @@ struct service_hndl { 
	unsigned long start_status;

	char *name;

	struct list_head list;

	int admin;

};



static inline int get_current_node(void)
@@ -135,6 +134,12 @@ int adf_enable_aer(struct adf_accel_dev *accel_dev, struct pci_driver *adf); 
void adf_disable_aer(struct adf_accel_dev *accel_dev);

int adf_init_aer(void);

void adf_exit_aer(void);

int adf_init_admin_comms(struct adf_accel_dev *accel_dev);

void adf_exit_admin_comms(struct adf_accel_dev *accel_dev);

int adf_send_admin_init(struct adf_accel_dev *accel_dev);

int adf_init_arb(struct adf_accel_dev *accel_dev);

void adf_exit_arb(struct adf_accel_dev *accel_dev);

void adf_update_ring_arb(struct adf_etr_ring_data *ring);



int adf_dev_get(struct adf_accel_dev *accel_dev);

void adf_dev_put(struct adf_accel_dev *accel_dev);

drivers/crypto/qat/qat_dh895xcc/adf_hw_arbiter.c→drivers/crypto/qat/qat_common/adf_hw_arbiter.c

+23 −14
Original line number Diff line number Diff line
@@ -44,9 +44,8 @@ 
  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

*/

#include <adf_accel_devices.h>

#include <adf_transport_internal.h>

#include "adf_drv.h"

#include "adf_accel_devices.h"

#include "adf_transport_internal.h"



#define ADF_ARB_NUM 4

#define ADF_ARB_REQ_RING_NUM 8
@@ -58,7 +57,6 @@ 
#define ADF_ARB_RO_EN_OFFSET 0x090

#define ADF_ARB_WQCFG_OFFSET 0x100

#define ADF_ARB_WRK_2_SER_MAP_OFFSET 0x180

#define ADF_ARB_WRK_2_SER_MAP 10

#define ADF_ARB_RINGSRVARBEN_OFFSET 0x19C



#define WRITE_CSR_ARB_RINGSRVARBEN(csr_addr, index, value) \
@@ -89,10 +87,11 @@ 


int adf_init_arb(struct adf_accel_dev *accel_dev)

{

	struct adf_hw_device_data *hw_data = accel_dev->hw_device;

	void __iomem *csr = accel_dev->transport->banks[0].csr_addr;

	uint32_t arb_cfg = 0x1 << 31 | 0x4 << 4 | 0x1;

	uint32_t arb, i;

	const uint32_t *thd_2_arb_cfg;

	u32 arb_cfg = 0x1 << 31 | 0x4 << 4 | 0x1;

	u32 arb, i;

	const u32 *thd_2_arb_cfg;



	/* Service arb configured for 32 bytes responses and

	 * ring flow control check enabled. */
@@ -109,30 +108,39 @@ int adf_init_arb(struct adf_accel_dev *accel_dev) 
		WRITE_CSR_ARB_RESPORDERING(csr, i, 0xFFFFFFFF);



	/* Setup worker queue registers */

	for (i = 0; i < ADF_ARB_WRK_2_SER_MAP; i++)

	for (i = 0; i < hw_data->num_engines; i++)

		WRITE_CSR_ARB_WQCFG(csr, i, i);



	/* Map worker threads to service arbiters */

	adf_get_arbiter_mapping(accel_dev, &thd_2_arb_cfg);

	hw_data->get_arb_mapping(accel_dev, &thd_2_arb_cfg);



	if (!thd_2_arb_cfg)

		return -EFAULT;



	for (i = 0; i < ADF_ARB_WRK_2_SER_MAP; i++)

	for (i = 0; i < hw_data->num_engines; i++)

		WRITE_CSR_ARB_WRK_2_SER_MAP(csr, i, *(thd_2_arb_cfg + i));



	return 0;

}

EXPORT_SYMBOL_GPL(adf_init_arb);



void adf_update_ring_arb_enable(struct adf_etr_ring_data *ring)

/**

 * adf_update_ring_arb() - update ring arbitration rgister

 * @accel_dev:  Pointer to ring data.

 *

 * Function enables or disables rings for/from arbitration.

 */

void adf_update_ring_arb(struct adf_etr_ring_data *ring)

{

	WRITE_CSR_ARB_RINGSRVARBEN(ring->bank->csr_addr,

				   ring->bank->bank_number,

				   ring->bank->ring_mask & 0xFF);

}

EXPORT_SYMBOL_GPL(adf_update_ring_arb);



void adf_exit_arb(struct adf_accel_dev *accel_dev)

{

	struct adf_hw_device_data *hw_data = accel_dev->hw_device;

	void __iomem *csr;

	unsigned int i;
@@ -146,14 +154,15 @@ void adf_exit_arb(struct adf_accel_dev *accel_dev) 
		WRITE_CSR_ARB_SARCONFIG(csr, i, 0);



	/* Shutdown work queue */

	for (i = 0; i < ADF_ARB_WRK_2_SER_MAP; i++)

	for (i = 0; i < hw_data->num_engines; i++)

		WRITE_CSR_ARB_WQCFG(csr, i, 0);



	/* Unmap worker threads to service arbiters */

	for (i = 0; i < ADF_ARB_WRK_2_SER_MAP; i++)

	for (i = 0; i < hw_data->num_engines; i++)

		WRITE_CSR_ARB_WRK_2_SER_MAP(csr, i, 0);



	/* Disable arbitration on all rings */

	for (i = 0; i < GET_MAX_BANKS(accel_dev); i++)

		WRITE_CSR_ARB_RINGSRVARBEN(csr, i, 0);

}

EXPORT_SYMBOL_GPL(adf_exit_arb);