msm: vidc: fix in UBWC LP5 Configuration



Default UBWC configuration for LPDDR5 is corrected.
Highest Bank Bit is set to 16.

Change-Id: I0fb18279ae32d34a7f3bada6d05a72c5935430dd
Signed-off-by: Akshata Sahukar <asahukar@codeaurora.org>

parent 954a066a

msm/vidc/msm_vidc_platform.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -779,7 +779,7 @@ static struct msm_vidc_efuse_data sdm670_efuse_data[] = {

		/* Default UBWC config for LPDDR5 */
		static struct msm_vidc_ubwc_config_data kona_ubwc_data[] = {
		UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 15, 0, 0),
		UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 16, 0, 0),
		};

		static struct msm_vidc_platform_data default_data = {