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Commit a480f308 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2017-10-11' of... 

Merge tag 'drm-intel-fixes-2017-10-11' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes

drm/i915 fixes for 4.14-rc5:

Three fixes for stable:

- Use crtc_state_is_legacy_gamma in intel_color_check (Maarten)
- Read timings from the correct transcoder (Ville).
- Fix HDMI on BSW (Jani).

Other fixes:

- eDP fixes (Manasi)
- Silence compiler warnings (Chris)
- Order two completing nop_submit_request (Chris)

* tag 'drm-intel-fixes-2017-10-11' of git://anongit.freedesktop.org/drm/drm-intel:
  drm/i915/bios: parse DDI ports also for CHV for HDMI DDC pin and DP AUX channel
  drm/i915: Read timings from the correct transcoder in intel_crtc_mode_get()
  drm/i915: Order two completing nop_submit_request
  drm/i915: Silence compiler warning for hsw_power_well_enable()
  drm/i915: Use crtc_state_is_legacy_gamma in intel_color_check
  drm/i915/edp: Increase the T12 delay quirk to 1300ms
  drm/i915/edp: Get the Panel Power Off timestamp after panel is off
parents 7a5bea77 ea850f64

drivers/gpu/drm/i915/i915_gem.c

+6 −1
Original line number Diff line number Diff line
@@ -3013,10 +3013,15 @@ void i915_gem_reset_finish(struct drm_i915_private *dev_priv) 


static void nop_submit_request(struct drm_i915_gem_request *request)

{

	unsigned long flags;



	GEM_BUG_ON(!i915_terminally_wedged(&request->i915->gpu_error));

	dma_fence_set_error(&request->fence, -EIO);

	i915_gem_request_submit(request);



	spin_lock_irqsave(&request->engine->timeline->lock, flags);

	__i915_gem_request_submit(request);

	intel_engine_init_global_seqno(request->engine, request->global_seqno);

	spin_unlock_irqrestore(&request->engine->timeline->lock, flags);

}



static void engine_set_wedged(struct intel_engine_cs *engine)

drivers/gpu/drm/i915/intel_bios.c

+1 −1
Original line number Diff line number Diff line
@@ -1240,7 +1240,7 @@ static void parse_ddi_ports(struct drm_i915_private *dev_priv, 
{

	enum port port;



	if (!HAS_DDI(dev_priv))

	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))

		return;



	if (!dev_priv->vbt.child_dev_num)

drivers/gpu/drm/i915/intel_color.c

+7 −9
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ 
#define I9XX_CSC_COEFF_1_0		\

	((7 << 12) | I9XX_CSC_COEFF_FP(CTM_COEFF_1_0, 8))



static bool crtc_state_is_legacy(struct drm_crtc_state *state)

static bool crtc_state_is_legacy_gamma(struct drm_crtc_state *state)

{

	return !state->degamma_lut &&

		!state->ctm &&
@@ -288,7 +288,7 @@ static void cherryview_load_csc_matrix(struct drm_crtc_state *state) 
	}



	mode = (state->ctm ? CGM_PIPE_MODE_CSC : 0);

	if (!crtc_state_is_legacy(state)) {

	if (!crtc_state_is_legacy_gamma(state)) {

		mode |= (state->degamma_lut ? CGM_PIPE_MODE_DEGAMMA : 0) |

			(state->gamma_lut ? CGM_PIPE_MODE_GAMMA : 0);

	}
@@ -469,7 +469,7 @@ static void broadwell_load_luts(struct drm_crtc_state *state) 
	struct intel_crtc_state *intel_state = to_intel_crtc_state(state);

	enum pipe pipe = to_intel_crtc(state->crtc)->pipe;



	if (crtc_state_is_legacy(state)) {

	if (crtc_state_is_legacy_gamma(state)) {

		haswell_load_luts(state);

		return;

	}
@@ -529,7 +529,7 @@ static void glk_load_luts(struct drm_crtc_state *state) 


	glk_load_degamma_lut(state);



	if (crtc_state_is_legacy(state)) {

	if (crtc_state_is_legacy_gamma(state)) {

		haswell_load_luts(state);

		return;

	}
@@ -551,7 +551,7 @@ static void cherryview_load_luts(struct drm_crtc_state *state) 
	uint32_t i, lut_size;

	uint32_t word0, word1;



	if (crtc_state_is_legacy(state)) {

	if (crtc_state_is_legacy_gamma(state)) {

		/* Turn off degamma/gamma on CGM block. */

		I915_WRITE(CGM_PIPE_MODE(pipe),

			   (state->ctm ? CGM_PIPE_MODE_CSC : 0));
@@ -632,12 +632,10 @@ int intel_color_check(struct drm_crtc *crtc, 
		return 0;



	/*

	 * We also allow no degamma lut and a gamma lut at the legacy

	 * We also allow no degamma lut/ctm and a gamma lut at the legacy

	 * size (256 entries).

	 */

	if (!crtc_state->degamma_lut &&

	    crtc_state->gamma_lut &&

	    crtc_state->gamma_lut->length == LEGACY_LUT_LENGTH)

	if (crtc_state_is_legacy_gamma(crtc_state))

		return 0;



	return -EINVAL;

drivers/gpu/drm/i915/intel_display.c

+9 −5
Original line number Diff line number Diff line
@@ -10245,13 +10245,10 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, 
{

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

	enum transcoder cpu_transcoder;

	struct drm_display_mode *mode;

	struct intel_crtc_state *pipe_config;

	int htot = I915_READ(HTOTAL(cpu_transcoder));

	int hsync = I915_READ(HSYNC(cpu_transcoder));

	int vtot = I915_READ(VTOTAL(cpu_transcoder));

	int vsync = I915_READ(VSYNC(cpu_transcoder));

	u32 htot, hsync, vtot, vsync;

	enum pipe pipe = intel_crtc->pipe;



	mode = kzalloc(sizeof(*mode), GFP_KERNEL);
@@ -10279,6 +10276,13 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, 
	i9xx_crtc_clock_get(intel_crtc, pipe_config);



	mode->clock = pipe_config->port_clock / pipe_config->pixel_multiplier;



	cpu_transcoder = pipe_config->cpu_transcoder;

	htot = I915_READ(HTOTAL(cpu_transcoder));

	hsync = I915_READ(HSYNC(cpu_transcoder));

	vtot = I915_READ(VTOTAL(cpu_transcoder));

	vsync = I915_READ(VSYNC(cpu_transcoder));



	mode->hdisplay = (htot & 0xffff) + 1;

	mode->htotal = ((htot & 0xffff0000) >> 16) + 1;

	mode->hsync_start = (hsync & 0xffff) + 1;

drivers/gpu/drm/i915/intel_dp.c

+2 −2
Original line number Diff line number Diff line
@@ -2307,8 +2307,8 @@ static void edp_panel_off(struct intel_dp *intel_dp) 
	I915_WRITE(pp_ctrl_reg, pp);

	POSTING_READ(pp_ctrl_reg);



	intel_dp->panel_power_off_time = ktime_get_boottime();

	wait_panel_off(intel_dp);

	intel_dp->panel_power_off_time = ktime_get_boottime();



	/* We got a reference when we enabled the VDD. */

	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
@@ -5273,7 +5273,7 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, 
	 * seems sufficient to avoid this problem.

	 */

	if (dev_priv->quirks & QUIRK_INCREASE_T12_DELAY) {

		vbt.t11_t12 = max_t(u16, vbt.t11_t12, 900 * 10);

		vbt.t11_t12 = max_t(u16, vbt.t11_t12, 1300 * 10);

		DRM_DEBUG_KMS("Increasing T12 panel delay as per the quirk to %d\n",

			      vbt.t11_t12);

	}