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Commit a4341e9d authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "power: qpnp-fg-gen4: Improve SDAM corruption check"

parents 649867c0 3da7600c

drivers/power/supply/qcom/qpnp-fg-gen4.c

+21 −11
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2018-2020 The Linux Foundation. All rights reserved.

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 */



#define pr_fmt(fmt)	"FG: %s: " fmt, __func__
@@ -30,12 +31,13 @@ 
#define FG_MEM_IF_PM8150B		0x0D

#define FG_ADC_RR_PM8150B		0x13



#define SDAM_COOKIE_OFFSET		0x80

#define SDAM_CYCLE_COUNT_OFFSET		0x81

#define SDAM_CAP_LEARN_OFFSET		0x91

#define SDAM_COOKIE			0xA5

#define SDAM_FG_PARAM_LENGTH		20



#define SDAM_COOKIE_OFFSET_4BYTE	0x95

#define SDAM_COOKIE_4BYTE		0x12345678



#define FG_SRAM_LEN			972

#define PROFILE_LEN			416

#define PROFILE_COMP_LEN		24
@@ -1302,7 +1304,7 @@ static int fg_gen4_store_learned_capacity(void *data, int64_t learned_cap_uah) 
	struct fg_dev *fg;

	int16_t cc_mah;

	int rc;

	u8 cookie = SDAM_COOKIE;

	u32 cookie_4byte = SDAM_COOKIE_4BYTE;



	if (!chip)

		return -ENODEV;
@@ -1329,8 +1331,8 @@ static int fg_gen4_store_learned_capacity(void *data, int64_t learned_cap_uah) 
			return rc;

		}



		rc = nvmem_device_write(chip->fg_nvmem, SDAM_COOKIE_OFFSET, 1,

					&cookie);

		rc = nvmem_device_write(chip->fg_nvmem,

			SDAM_COOKIE_OFFSET_4BYTE, 1, &cookie_4byte);

		if (rc < 0) {

			pr_err("Error in writing cookie to SDAM, rc=%d\n", rc);

			return rc;
@@ -2377,17 +2379,17 @@ static bool is_sdam_cookie_set(struct fg_gen4_chip *chip) 
{

	struct fg_dev *fg = &chip->fg;

	int rc;

	u8 cookie;

	u32 cookie_4byte;



	rc = nvmem_device_read(chip->fg_nvmem, SDAM_COOKIE_OFFSET, 1,

				&cookie);

	rc = nvmem_device_read(chip->fg_nvmem, SDAM_COOKIE_OFFSET_4BYTE, 4,

			&cookie_4byte);

	if (rc < 0) {

		pr_err("Error in reading SDAM_COOKIE rc=%d\n", rc);

		return false;

	}



	fg_dbg(fg, FG_STATUS, "cookie: %x\n", cookie);

	return (cookie == SDAM_COOKIE);

	fg_dbg(fg, FG_STATUS, "cookie_4byte: %08x\n", cookie_4byte);

	return (cookie_4byte == SDAM_COOKIE_4BYTE);

}



static void fg_gen4_clear_sdam(struct fg_gen4_chip *chip)
@@ -2411,8 +2413,9 @@ static void fg_gen4_clear_sdam(struct fg_gen4_chip *chip) 
static void fg_gen4_post_profile_load(struct fg_gen4_chip *chip)

{

	struct fg_dev *fg = &chip->fg;

	int rc, act_cap_mah;

	int rc = 0, act_cap_mah;

	u8 buf[16] = {0};

	u32 cookie_4byte = 0;



	if (chip->dt.multi_profile_load &&

		chip->batt_age_level != chip->last_batt_age_level) {
@@ -2466,6 +2469,13 @@ static void fg_gen4_post_profile_load(struct fg_gen4_chip *chip) 
				pr_err("Error in writing learned capacity to SDAM, rc=%d\n",

					rc);

		}



		/* Set the COOKIE to prevent rechecking the SRAM again */

		cookie_4byte = SDAM_COOKIE_4BYTE;

		rc = nvmem_device_write(chip->fg_nvmem,

			SDAM_COOKIE_OFFSET_4BYTE, 4, (u8 *)&cookie_4byte);

		if (rc < 0)

			pr_err("Failed to set SDAM cookie, rc=%d\n", rc);

	}



	/* Restore the cycle counters so that it would be valid at this point */