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Commit a4315592 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branch 'clk-fixes' into clk-next 

* clk-fixes:
  clk: mmp: pxa910: fix return value check in pxa910_clk_init()
  clk: mmp: pxa168: fix return value check in pxa168_clk_init()
  clk: mmp: mmp2: fix return value check in mmp2_clk_init()
  clk: qoriq: Don't allow CPU clocks higher than starting value
parents f747597e 10f2bfb0

drivers/clk/clk-qoriq.c

+8 −5
Original line number Diff line number Diff line
@@ -740,6 +740,7 @@ static struct clk * __init create_mux_common(struct clockgen *cg, 
					     struct mux_hwclock *hwc,

					     const struct clk_ops *ops,

					     unsigned long min_rate,

					     unsigned long max_rate,

					     unsigned long pct80_rate,

					     const char *fmt, int idx)

{
@@ -768,6 +769,8 @@ static struct clk * __init create_mux_common(struct clockgen *cg, 
			continue;

		if (rate < min_rate)

			continue;

		if (rate > max_rate)

			continue;



		parent_names[j] = div->name;

		hwc->parent_to_clksel[j] = i;
@@ -799,7 +802,7 @@ static struct clk * __init create_one_cmux(struct clockgen *cg, int idx) 
	struct mux_hwclock *hwc;

	const struct clockgen_pll_div *div;

	unsigned long plat_rate, min_rate;

	u64 pct80_rate;

	u64 max_rate, pct80_rate;

	u32 clksel;



	hwc = kzalloc(sizeof(*hwc), GFP_KERNEL);
@@ -827,8 +830,8 @@ static struct clk * __init create_one_cmux(struct clockgen *cg, int idx) 
		return NULL;

	}



	pct80_rate = clk_get_rate(div->clk);

	pct80_rate *= 8;

	max_rate = clk_get_rate(div->clk);

	pct80_rate = max_rate * 8;

	do_div(pct80_rate, 10);



	plat_rate = clk_get_rate(cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk);
@@ -838,7 +841,7 @@ static struct clk * __init create_one_cmux(struct clockgen *cg, int idx) 
	else

		min_rate = plat_rate / 2;



	return create_mux_common(cg, hwc, &cmux_ops, min_rate,

	return create_mux_common(cg, hwc, &cmux_ops, min_rate, max_rate,

				 pct80_rate, "cg-cmux%d", idx);

}
@@ -853,7 +856,7 @@ static struct clk * __init create_one_hwaccel(struct clockgen *cg, int idx) 
	hwc->reg = cg->regs + 0x20 * idx + 0x10;

	hwc->info = cg->info.hwaccel[idx];



	return create_mux_common(cg, hwc, &hwaccel_ops, 0, 0,

	return create_mux_common(cg, hwc, &hwaccel_ops, 0, ULONG_MAX, 0,

				 "cg-hwaccel%d", idx);

}

drivers/clk/mmp/clk-of-mmp2.c

+1 −1
Original line number Diff line number Diff line
@@ -313,7 +313,7 @@ static void __init mmp2_clk_init(struct device_node *np) 
	}



	pxa_unit->apmu_base = of_iomap(np, 1);

	if (!pxa_unit->mpmu_base) {

	if (!pxa_unit->apmu_base) {

		pr_err("failed to map apmu registers\n");

		return;

	}

drivers/clk/mmp/clk-of-pxa168.c

+1 −1
Original line number Diff line number Diff line
@@ -262,7 +262,7 @@ static void __init pxa168_clk_init(struct device_node *np) 
	}



	pxa_unit->apmu_base = of_iomap(np, 1);

	if (!pxa_unit->mpmu_base) {

	if (!pxa_unit->apmu_base) {

		pr_err("failed to map apmu registers\n");

		return;

	}

drivers/clk/mmp/clk-of-pxa910.c

+2 −2
Original line number Diff line number Diff line
@@ -282,7 +282,7 @@ static void __init pxa910_clk_init(struct device_node *np) 
	}



	pxa_unit->apmu_base = of_iomap(np, 1);

	if (!pxa_unit->mpmu_base) {

	if (!pxa_unit->apmu_base) {

		pr_err("failed to map apmu registers\n");

		return;

	}
@@ -294,7 +294,7 @@ static void __init pxa910_clk_init(struct device_node *np) 
	}



	pxa_unit->apbcp_base = of_iomap(np, 3);

	if (!pxa_unit->mpmu_base) {

	if (!pxa_unit->apbcp_base) {

		pr_err("failed to map apbcp registers\n");

		return;

	}