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Commit a2f2f740 authored by Thierry Reding's avatar Thierry Reding
Browse files

drm/tegra: dc: Perform a complete reset sequence 



In order for the reset to be applied properly, the module clock must be
enabled during the assertion.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 39e08aff

drivers/gpu/drm/tegra/dc.c

+16 −2
Original line number Diff line number Diff line
@@ -1997,8 +1997,22 @@ static int tegra_dc_probe(struct platform_device *pdev) 
		return PTR_ERR(dc->rst);

	}



	if (!dc->soc->broken_reset)

		reset_control_assert(dc->rst);

	/* assert reset and disable clock */

	if (!dc->soc->broken_reset) {

		err = clk_prepare_enable(dc->clk);

		if (err < 0)

			return err;



		usleep_range(2000, 4000);



		err = reset_control_assert(dc->rst);

		if (err < 0)

			return err;



		usleep_range(2000, 4000);



		clk_disable_unprepare(dc->clk);

	}



	if (dc->soc->has_powergate) {

		if (dc->pipe == 0)