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Commit a28cfb84 authored by Kumar Gala's avatar Kumar Gala
Browse files

Merge branch '85xx' into for_paulus

parents 7baca6ad eb11a720

arch/powerpc/boot/dts/mpc8568mds.dts

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/*

 * MPC8568E MDS Device Tree Source

 *

 * Copyright 2007 Freescale Semiconductor Inc.

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 */





/*

/memreserve/	00000000 1000000;

*/



/ {

	model = "MPC8568EMDS";

	compatible = "MPC85xxMDS";

	#address-cells = <1>;

	#size-cells = <1>;

	linux,phandle = <100>;



	cpus {

		#cpus = <1>;

		#address-cells = <1>;

		#size-cells = <0>;

		linux,phandle = <200>;



		PowerPC,8568@0 {

			device_type = "cpu";

			reg = <0>;

			d-cache-line-size = <20>;	// 32 bytes

			i-cache-line-size = <20>;	// 32 bytes

			d-cache-size = <8000>;		// L1, 32K

			i-cache-size = <8000>;		// L1, 32K

			timebase-frequency = <0>;

			bus-frequency = <0>;

			clock-frequency = <0>;

			32-bit;

			linux,phandle = <201>;

		};

	};



	memory {

		device_type = "memory";

		linux,phandle = <300>;

		reg = <00000000 10000000>;

	};



	bcsr@f8000000 {

		device_type = "board-control";

		reg = <f8000000 8000>;

	};



	soc8568@e0000000 {

		#address-cells = <1>;

		#size-cells = <1>;

		#interrupt-cells = <2>;

		device_type = "soc";

		ranges = <0 e0000000 00100000>;

		reg = <e0000000 00100000>;

		bus-frequency = <0>;



		i2c@3000 {

			device_type = "i2c";

			compatible = "fsl-i2c";

			reg = <3000 100>;

			interrupts = <1b 2>;

			interrupt-parent = <40000>;

			dfsrr;

		};



		i2c@3100 {

			device_type = "i2c";

			compatible = "fsl-i2c";

			reg = <3100 100>;

			interrupts = <1b 2>;

			interrupt-parent = <40000>;

			dfsrr;

		};



		mdio@24520 {

			#address-cells = <1>;

			#size-cells = <0>;

			device_type = "mdio";

			compatible = "gianfar";

			reg = <24520 20>;

			linux,phandle = <24520>;

			ethernet-phy@0 {

				linux,phandle = <2452000>;

				interrupt-parent = <40000>;

				interrupts = <31 1>;

				reg = <0>;

				device_type = "ethernet-phy";

			};

			ethernet-phy@1 {

				linux,phandle = <2452001>;

				interrupt-parent = <40000>;

				interrupts = <32 1>;

				reg = <1>;

				device_type = "ethernet-phy";

			};



			ethernet-phy@2 {

				linux,phandle = <2452002>;

				interrupt-parent = <40000>;

				interrupts = <31 1>;

				reg = <2>;

				device_type = "ethernet-phy";

			};

			ethernet-phy@3 {

				linux,phandle = <2452003>;

				interrupt-parent = <40000>;

				interrupts = <32 1>;

				reg = <3>;

				device_type = "ethernet-phy";

			};

		};



		ethernet@24000 {

			#address-cells = <1>;

			#size-cells = <0>;

			device_type = "network";

			model = "eTSEC";

			compatible = "gianfar";

			reg = <24000 1000>;

			mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <d 2 e 2 12 2>;

			interrupt-parent = <40000>;

			phy-handle = <2452002>;

		};



		ethernet@25000 {

			#address-cells = <1>;

			#size-cells = <0>;

			device_type = "network";

			model = "eTSEC";

			compatible = "gianfar";

			reg = <25000 1000>;

			mac-address = [ 00 00 00 00 00 00];

			interrupts = <13 2 14 2 18 2>;

			interrupt-parent = <40000>;

			phy-handle = <2452003>;

		};



		serial@4500 {

			device_type = "serial";

			compatible = "ns16550";

			reg = <4500 100>;

			clock-frequency = <0>;

			interrupts = <1a 2>;

			interrupt-parent = <40000>;

		};



		serial@4600 {

			device_type = "serial";

			compatible = "ns16550";

			reg = <4600 100>;

			clock-frequency = <0>;

			interrupts = <1a 2>;

			interrupt-parent = <40000>;

		};



		crypto@30000 {

			device_type = "crypto";

			model = "SEC2";

			compatible = "talitos";

			reg = <30000 f000>;

			interrupts = <1d 2>;

			interrupt-parent = <40000>;

			num-channels = <4>;

			channel-fifo-len = <18>;

			exec-units-mask = <000000fe>;

			descriptor-types-mask = <012b0ebf>;

		};



		pic@40000 {

			linux,phandle = <40000>;

			clock-frequency = <0>;

			interrupt-controller;

			#address-cells = <0>;

			#interrupt-cells = <2>;

			reg = <40000 40000>;

			built-in;

			compatible = "chrp,open-pic";

			device_type = "open-pic";

                        big-endian;

		};

		par_io@e0100 {

			reg = <e0100 100>;

			device_type = "par_io";

			num-ports = <7>;



			ucc_pin@01 {

				linux,phandle = <e010001>;

				pio-map = <

			/* port  pin  dir  open_drain  assignment  has_irq */

					4  0a  1  0  2  0 	/* TxD0 */

					4  09  1  0  2  0 	/* TxD1 */

					4  08  1  0  2  0 	/* TxD2 */

					4  07  1  0  2  0 	/* TxD3 */

					4  17  1  0  2  0 	/* TxD4 */

					4  16  1  0  2  0 	/* TxD5 */

					4  15  1  0  2  0 	/* TxD6 */

					4  14  1  0  2  0 	/* TxD7 */

					4  0f  2  0  2  0 	/* RxD0 */

					4  0e  2  0  2  0 	/* RxD1 */

					4  0d  2  0  2  0 	/* RxD2 */

					4  0c  2  0  2  0 	/* RxD3 */

					4  1d  2  0  2  0 	/* RxD4 */

					4  1c  2  0  2  0 	/* RxD5 */

					4  1b  2  0  2  0 	/* RxD6 */

					4  1a  2  0  2  0 	/* RxD7 */

					4  0b  1  0  2  0 	/* TX_EN */

					4  18  1  0  2  0 	/* TX_ER */

					4  0f  2  0  2  0 	/* RX_DV */

					4  1e  2  0  2  0 	/* RX_ER */

					4  11  2  0  2  0 	/* RX_CLK */

					4  13  1  0  2  0 	/* GTX_CLK */

					1  1f  2  0  3  0>;	/* GTX125 */

			};

			ucc_pin@02 {

				linux,phandle = <e010002>;

				pio-map = <

			/* port  pin  dir  open_drain  assignment  has_irq */

					5  0a 1  0  2  0   /* TxD0 */

					5  09 1  0  2  0   /* TxD1 */

					5  08 1  0  2  0   /* TxD2 */

					5  07 1  0  2  0   /* TxD3 */

					5  17 1  0  2  0   /* TxD4 */

					5  16 1  0  2  0   /* TxD5 */

					5  15 1  0  2  0   /* TxD6 */

					5  14 1  0  2  0   /* TxD7 */

					5  0f 2  0  2  0   /* RxD0 */

					5  0e 2  0  2  0   /* RxD1 */

					5  0d 2  0  2  0   /* RxD2 */

					5  0c 2  0  2  0   /* RxD3 */

					5  1d 2  0  2  0   /* RxD4 */

					5  1c 2  0  2  0   /* RxD5 */

					5  1b 2  0  2  0   /* RxD6 */

					5  1a 2  0  2  0   /* RxD7 */

					5  0b 1  0  2  0   /* TX_EN */

					5  18 1  0  2  0   /* TX_ER */

					5  10 2  0  2  0   /* RX_DV */

					5  1e 2  0  2  0   /* RX_ER */

					5  11 2  0  2  0   /* RX_CLK */

					5  13 1  0  2  0   /* GTX_CLK */

					1  1f 2  0  3  0   /* GTX125 */

					4  06 3  0  2  0   /* MDIO */

					4  05 1  0  2  0>; /* MDC */

			};

		};

	};



	qe@e0080000 {

		#address-cells = <1>;

		#size-cells = <1>;

		device_type = "qe";

		model = "QE";

		ranges = <0 e0080000 00040000>;

		reg = <e0080000 480>;

		brg-frequency = <0>;

		bus-frequency = <179A7B00>;



		muram@10000 {

			device_type = "muram";

			ranges = <0 00010000 0000c000>;



			data-only@0{

				reg = <0 c000>;

			};

		};



		spi@4c0 {

			device_type = "spi";

			compatible = "fsl_spi";

			reg = <4c0 40>;

			interrupts = <2>;

			interrupt-parent = <80>;

			mode = "cpu";

		};



		spi@500 {

			device_type = "spi";

			compatible = "fsl_spi";

			reg = <500 40>;

			interrupts = <1>;

			interrupt-parent = <80>;

			mode = "cpu";

		};



		ucc@2000 {

			device_type = "network";

			compatible = "ucc_geth";

			model = "UCC";

			device-id = <1>;

			reg = <2000 200>;

			interrupts = <20>;

			interrupt-parent = <80>;

			mac-address = [ 00 04 9f 00 23 23 ];

			rx-clock = <0>;

			tx-clock = <19>;

			phy-handle = <212000>;

			pio-handle = <e010001>;

		};



		ucc@3000 {

			device_type = "network";

			compatible = "ucc_geth";

			model = "UCC";

			device-id = <2>;

			reg = <3000 200>;

			interrupts = <21>;

			interrupt-parent = <80>;

			mac-address = [ 00 11 22 33 44 55 ];

			rx-clock = <0>;

			tx-clock = <14>;

			phy-handle = <212001>;

			pio-handle = <e010002>;

		};



		mdio@2120 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <2120 18>;

			device_type = "mdio";

			compatible = "ucc_geth_phy";



			/* These are the same PHYs as on

			 * gianfar's MDIO bus */

			ethernet-phy@00 {

				linux,phandle = <212000>;

				interrupt-parent = <40000>;

				interrupts = <31 1>;

				reg = <0>;

				device_type = "ethernet-phy";

				interface = <6>; //ENET_1000_GMII

			};

			ethernet-phy@01 {

				linux,phandle = <212001>;

				interrupt-parent = <40000>;

				interrupts = <32 1>;

				reg = <1>;

				device_type = "ethernet-phy";

				interface = <6>;

			};

			ethernet-phy@02 {

				linux,phandle = <212002>;

				interrupt-parent = <40000>;

				interrupts = <31 1>;

				reg = <2>;

				device_type = "ethernet-phy";

				interface = <6>; //ENET_1000_GMII

			};

			ethernet-phy@03 {

				linux,phandle = <212003>;

				interrupt-parent = <40000>;

				interrupts = <32 1>;

				reg = <3>;

				device_type = "ethernet-phy";

				interface = <6>; //ENET_1000_GMII

			};

		};



		qeic@80 {

			linux,phandle = <80>;

			interrupt-controller;

			device_type = "qeic";

			#address-cells = <0>;

			#interrupt-cells = <1>;

			reg = <80 80>;

			built-in;

			big-endian;

			interrupts = <1e 2 1e 2>; //high:30 low:30

			interrupt-parent = <40000>;

		};



	};

};

arch/powerpc/configs/mpc8568mds_defconfig

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File added.

Preview size limit exceeded, changes collapsed.

arch/powerpc/kernel/head_fsl_booke.S

+4 −1
Original line number Diff line number Diff line
@@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */ 
	rlwimi	r7,r3,16,4,15	/* Setup MAS0 = TLBSEL | ESEL(r3) */

	mtspr	SPRN_MAS0,r7

	tlbre

	li	r6,0

	mfspr	r6,SPRN_MAS1

	rlwinm	r6,r6,0,2,0	/* clear IPROT */

	mtspr	SPRN_MAS1,r6

	tlbwe

	/* Invalidate TLB1 */
@@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */ 
	rlwimi	r7,r5,16,4,15	/* Setup MAS0 = TLBSEL | ESEL(r5) */

	mtspr	SPRN_MAS0,r7

	tlbre

	mfspr	r8,SPRN_MAS1

	rlwinm	r8,r8,0,2,0	/* clear IPROT */

	mtspr	SPRN_MAS1,r8

	tlbwe

	/* Invalidate TLB1 */

arch/powerpc/platforms/85xx/Kconfig

+13 −0
Original line number Diff line number Diff line
@@ -23,6 +23,13 @@ config MPC85xx_CDS 
	help

	  This option enables support for the MPC85xx CDS board



config MPC8568_MDS

	bool "Freescale MPC8568 MDS"

	select DEFAULT_UIMAGE

#	select QUICC_ENGINE

	help

	  This option enables support for the MPC8568 MDS board



endchoice



config MPC8540
@@ -36,6 +43,12 @@ config MPC8560 
	select PPC_INDIRECT_PCI

	default y if MPC8560_ADS



config MPC85xx

	bool

	select PPC_UDBG_16550

	select PPC_INDIRECT_PCI

	default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC8568_MDS



config PPC_INDIRECT_PCI_BE

	bool

	depends on PPC_85xx

arch/powerpc/platforms/85xx/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_85xx) += misc.o pci.o 
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o

obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o

obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o

obj-$(CONFIG_MPC8568_MDS) += mpc8568_mds.o