Unverified Commit a1cc7034 authored Apr 12, 2018 by Sinan Kaya Committed by James Hogan Apr 14, 2018

MIPS: io: Add barrier after register read in readX()



While a barrier is present in the writeX() functions before the register
write, a similar barrier is missing in the readX() functions after the
register read. This could allow memory accesses following readX() to
observe stale data.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/19069/


[jhogan@kernel.org: Tidy commit message]
Signed-off-by: James Hogan <jhogan@kernel.org>

parent f6b7aeee

arch/mips/include/asm/io.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -377,6 +377,8 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \
		BUG(); \
		} \
		\
		/* prevent prefetching of coherent DMA data prematurely */ \
		rmb(); \
		return pfx##ioswab##bwlq(__mem, __val); \
		}