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Commit a1792cda authored by John Hsu's avatar John Hsu Committed by Mark Brown
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ASoC: nau8825: fix invalid configuration in Pre-Scalar of FLL



The clk_ref_div is not configured in the correct position of the
register. The patch fixes that clk_ref_div, Pre-Scalar, is assigned
the wrong value.

Signed-off-by: default avatarJohn Hsu <KCHSU0@nuvoton.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent a33b56a6
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+2 −1
Original line number Diff line number Diff line
@@ -2006,7 +2006,8 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
			NAU8825_FLL_INTEGER_MASK, fll_param->fll_int);
	/* FLL pre-scaler */
	regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL4,
			NAU8825_FLL_REF_DIV_MASK, fll_param->clk_ref_div);
			NAU8825_FLL_REF_DIV_MASK,
			fll_param->clk_ref_div << NAU8825_FLL_REF_DIV_SFT);
	/* select divided VCO input */
	regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
		NAU8825_FLL_CLK_SW_MASK, NAU8825_FLL_CLK_SW_REF);
+2 −1
Original line number Diff line number Diff line
@@ -137,7 +137,8 @@
#define NAU8825_FLL_CLK_SRC_FS			(0x3 << NAU8825_FLL_CLK_SRC_SFT)

/* FLL4 (0x07) */
#define NAU8825_FLL_REF_DIV_MASK		(0x3 << 10)
#define NAU8825_FLL_REF_DIV_SFT	10
#define NAU8825_FLL_REF_DIV_MASK	(0x3 << NAU8825_FLL_REF_DIV_SFT)

/* FLL5 (0x08) */
#define NAU8825_FLL_PDB_DAC_EN		(0x1 << 15)