Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a1652bb8 authored by Jean Delvare's avatar Jean Delvare Committed by Ingo Molnar
Browse files

x86/boot: Spell out "boot CPU" for BP 



It's not obvious to everybody that BP stands for boot processor. At
least it was not for me. And BP is also a CPU register on x86, so it
is ambiguous. Spell out "boot CPU" everywhere instead.

Signed-off-by: default avatarJean Delvare <jdelvare@suse.de>
Cc: Alok Kataria <akataria@vmware.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 9e66317d

arch/x86/include/asm/mpspec_def.h

+1 −1
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ struct mpc_table { 
#define	MP_TRANSLATION		192



#define CPU_ENABLED		1	/* Processor is available */

#define CPU_BOOTPROCESSOR	2	/* Processor is the BP */

#define CPU_BOOTPROCESSOR	2	/* Processor is the boot CPU */



#define CPU_STEPPING_MASK	0x000F

#define CPU_MODEL_MASK		0x00F0

arch/x86/kernel/apic/apic.c

+1 −1
Original line number Diff line number Diff line
@@ -1462,7 +1462,7 @@ void setup_local_APIC(void) 
	/*

	 * Set up LVT0, LVT1:

	 *

	 * set up through-local-APIC on the BP's LINT0. This is not

	 * set up through-local-APIC on the boot CPU's LINT0. This is not

	 * strictly necessary in pure symmetric-IO mode, but sometimes

	 * we delegate interrupts to the 8259A.

	 */

arch/x86/kernel/cpu/common.c

+2 −2
Original line number Diff line number Diff line
@@ -863,8 +863,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) 
 * cache alignment.

 * The others are not touched to avoid unwanted side effects.

 *

 * WARNING: this function is only called on the BP.  Don't add code here

 * that is supposed to run on all CPUs.

 * WARNING: this function is only called on the boot CPU.  Don't add code

 * here that is supposed to run on all CPUs.

 */

static void __init early_identify_cpu(struct cpuinfo_x86 *c)

{

arch/x86/kernel/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -1045,7 +1045,7 @@ void __init setup_arch(char **cmdline_p) 


	/*

	 * VMware detection requires dmi to be available, so this

	 * needs to be done after dmi_scan_machine, for the BP.

	 * needs to be done after dmi_scan_machine(), for the boot CPU.

	 */

	init_hypervisor_platform();

arch/x86/kernel/smpboot.c

+1 −1
Original line number Diff line number Diff line
@@ -249,7 +249,7 @@ static void notrace start_secondary(void *unused) 
	/* otherwise gcc will move up smp_processor_id before the cpu_init */

	barrier();

	/*

	 * Check TSC synchronization with the BP:

	 * Check TSC synchronization with the boot CPU:

	 */

	check_tsc_sync_target();