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Commit a1400cdb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cpuid updates from Ingo Molnar:
 "AMD F17h related updates"

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu/amd: Hide unused legacy_fixup_core_id() function
  x86/cpu/amd: Derive L3 shared_cpu_map from cpu_llc_shared_mask
  x86/cpu/amd: Limit cpu_core_id fixup to families older than F17h
parents d5e54c4e aac64f7d

arch/x86/kernel/cpu/amd.c

+18 −8
Original line number Original line Diff line number Diff line
@@ -297,13 +297,29 @@ static int nearby_node(int apicid) 
}

}

#endif

#endif





#ifdef CONFIG_SMP

/*

 * Fix up cpu_core_id for pre-F17h systems to be in the

 * [0 .. cores_per_node - 1] range. Not really needed but

 * kept so as not to break existing setups.

 */

static void legacy_fixup_core_id(struct cpuinfo_x86 *c)

{

	u32 cus_per_node;



	if (c->x86 >= 0x17)

		return;



	cus_per_node = c->x86_max_cores / nodes_per_socket;

	c->cpu_core_id %= cus_per_node;

}



/*

/*

 * Fixup core topology information for

 * Fixup core topology information for

 * (1) AMD multi-node processors

 * (1) AMD multi-node processors

 *     Assumption: Number of cores in each internal node is the same.

 *     Assumption: Number of cores in each internal node is the same.

 * (2) AMD processors supporting compute units

 * (2) AMD processors supporting compute units

 */

 */

#ifdef CONFIG_SMP

static void amd_get_topology(struct cpuinfo_x86 *c)

static void amd_get_topology(struct cpuinfo_x86 *c)

{

{

	u8 node_id;

	u8 node_id;
@@ -354,15 +370,9 @@ static void amd_get_topology(struct cpuinfo_x86 *c) 
	} else

	} else

		return;

		return;





	/* fixup multi-node processor information */

	if (nodes_per_socket > 1) {

	if (nodes_per_socket > 1) {

		u32 cus_per_node;



		set_cpu_cap(c, X86_FEATURE_AMD_DCM);

		set_cpu_cap(c, X86_FEATURE_AMD_DCM);

		cus_per_node = c->x86_max_cores / nodes_per_socket;

		legacy_fixup_core_id(c);



		/* core id has to be in the [0 .. cores_per_node - 1] range */

		c->cpu_core_id %= cus_per_node;

	}

	}

}

}

#endif

#endif

arch/x86/kernel/cpu/intel_cacheinfo.c

+18 −14
Original line number Original line Diff line number Diff line
@@ -811,7 +811,24 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int index, 
	struct cacheinfo *this_leaf;

	struct cacheinfo *this_leaf;

	int i, sibling;

	int i, sibling;





	if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {

	/*

	 * For L3, always use the pre-calculated cpu_llc_shared_mask

	 * to derive shared_cpu_map.

	 */

	if (index == 3) {

		for_each_cpu(i, cpu_llc_shared_mask(cpu)) {

			this_cpu_ci = get_cpu_cacheinfo(i);

			if (!this_cpu_ci->info_list)

				continue;

			this_leaf = this_cpu_ci->info_list + index;

			for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {

				if (!cpu_online(sibling))

					continue;

				cpumask_set_cpu(sibling,

						&this_leaf->shared_cpu_map);

			}

		}

	} else if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {

		unsigned int apicid, nshared, first, last;

		unsigned int apicid, nshared, first, last;





		this_leaf = this_cpu_ci->info_list + index;

		this_leaf = this_cpu_ci->info_list + index;
@@ -839,19 +856,6 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int index, 
						&this_leaf->shared_cpu_map);

						&this_leaf->shared_cpu_map);

			}

			}

		}

		}

	} else if (index == 3) {

		for_each_cpu(i, cpu_llc_shared_mask(cpu)) {

			this_cpu_ci = get_cpu_cacheinfo(i);

			if (!this_cpu_ci->info_list)

				continue;

			this_leaf = this_cpu_ci->info_list + index;

			for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {

				if (!cpu_online(sibling))

					continue;

				cpumask_set_cpu(sibling,

						&this_leaf->shared_cpu_map);

			}

		}

	} else

	} else

		return 0;

		return 0;