Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a09e23f5 authored by Mian Yousaf Kaukab's avatar Mian Yousaf Kaukab Committed by Felipe Balbi
Browse files

usb: gadget: net2280: check interrupts for all endpoints



USB3380 in enhanced mode has 4 IN and 4 OUT endpoints. Check
interrupts for all of them.

Tested-by: default avatarRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: default avatarMian Yousaf Kaukab <yousaf.kaukab@intel.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 463e104f
Loading
Loading
Loading
Loading
+44 −13
Original line number Diff line number Diff line
@@ -2883,6 +2883,26 @@ static void handle_stat0_irqs_superspeed(struct net2280 *dev,
	return;
}

static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
{
	u32 index;
	u32 bit;

	for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
		bit = BIT(ep_bit[index]);

		if (!stat0)
			break;

		if (!(stat0 & bit))
			continue;

		stat0 &= ~bit;

		handle_ep_small(&dev->ep[index]);
	}
}

static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
{
	struct net2280_ep	*ep;
@@ -3107,6 +3127,16 @@ static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
#undef	w_length

next_endpoints:
	if ((dev->quirks & PLX_SUPERSPEED) && dev->enhanced_mode) {
		u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
			USB3380_IRQSTAT0_EP_INTR_MASK_IN |
			USB3380_IRQSTAT0_EP_INTR_MASK_OUT);

		if (stat & mask) {
			usb338x_handle_ep_intr(dev, stat & mask);
			stat &= ~mask;
		}
	} else {
		/* endpoint data irq ? */
		scratch = stat & 0x7f;
		stat &= ~0x7f;
@@ -3122,6 +3152,7 @@ static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
			ep = &dev->ep[num];
			handle_ep_small(ep);
		}
	}

	if (stat)
		ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
+3 −0
Original line number Diff line number Diff line
@@ -168,6 +168,9 @@ struct net2280_regs {
#define     ENDPOINT_B_INTERRUPT                                2
#define     ENDPOINT_A_INTERRUPT                                1
#define     ENDPOINT_0_INTERRUPT                                0
#define     USB3380_IRQSTAT0_EP_INTR_MASK_IN (0xF << 17)
#define     USB3380_IRQSTAT0_EP_INTR_MASK_OUT (0xF << 1)

	u32		irqstat1;
#define     POWER_STATE_CHANGE_INTERRUPT                        27
#define     PCI_ARBITER_TIMEOUT_INTERRUPT                       26