Commit a0504f08 authored Mar 06, 2017 by Geert Uytterhoeven Committed by Simon Horman Mar 07, 2017

ARM: dts: r8a7792: Remove unit-address and reg from integrated cache



The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 7c4163aa ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

parent 5d6a2165

arch/arm/boot/dts/r8a7792.dtsi

+1 −2

Original line number	Diff line number	Diff line
		@@ -60,9 +60,8 @@
		next-level-cache = <&L2_CA15>;
		};

		L2_CA15: cache-controller@0 {
		L2_CA15: cache-controller-0 {
		compatible = "cache";
		reg = <0>;
		cache-unified;
		cache-level = <2>;
		power-domains = <&sysc R8A7792_PD_CA15_SCU>;