Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9f7f797c authored by Nogah Frankel's avatar Nogah Frankel Committed by David S. Miller
Browse files

mlxsw: pci: Add lag related resources to resources query



Add max lag and max ports in lag resources to resources query.

Signed-off-by: default avatarNogah Frankel <nogahf@mellanox.com>
Reviewed-by: default avatarIdo Schimmel <idosch@mellanox.com>
Signed-off-by: default avatarJiri Pirko <jiri@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4bdcc6ca
Loading
Loading
Loading
Loading
+5 −1
Original line number Diff line number Diff line
@@ -269,8 +269,12 @@ struct mlxsw_driver {
};

struct mlxsw_resources {
	u8	max_span_valid:1;
	u8	max_span_valid:1,
		max_lag_valid:1,
		max_ports_in_lag_valid:1;
	u8      max_span;
	u8	max_lag;
	u8	max_ports_in_lag;
};

struct mlxsw_resources *mlxsw_core_resources_get(struct mlxsw_core *mlxsw_core);
+10 −0
Original line number Diff line number Diff line
@@ -1156,6 +1156,8 @@ mlxsw_pci_config_profile_swid_config(struct mlxsw_pci *mlxsw_pci,

#define MLXSW_RESOURCES_TABLE_END_ID 0xffff
#define MLXSW_MAX_SPAN_ID 0x2420
#define MLXSW_MAX_LAG_ID 0x2520
#define MLXSW_MAX_PORTS_IN_LAG_ID 0x2521
#define MLXSW_RESOURCES_QUERY_MAX_QUERIES 100
#define MLXSW_RESOURCES_PER_QUERY 32

@@ -1167,6 +1169,14 @@ static void mlxsw_pci_resources_query_parse(int id, u64 val,
		resources->max_span = val;
		resources->max_span_valid = 1;
		break;
	case MLXSW_MAX_LAG_ID:
		resources->max_lag = val;
		resources->max_lag_valid = 1;
		break;
	case MLXSW_MAX_PORTS_IN_LAG_ID:
		resources->max_ports_in_lag = val;
		resources->max_ports_in_lag_valid = 1;
		break;
	default:
		break;
	}