Merge 3417ab437b170bd4fc32767999b94870763bd46f on remote branch (9efbd502) · Commits · e / devices / android_kernel_fairphone_FP4

fw/htt.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -654,6 +654,9 @@ typedef enum {
		HTT_STATS_SOC_TXRX_STATS_COMMON_TAG = 125, /* htt_t2h_soc_txrx_stats_common_tlv */
		HTT_STATS_VDEV_TXRX_STATS_HW_STATS_TAG = 126, /* htt_t2h_vdev_txrx_stats_hw_stats_tlv */
		HTT_STATS_VDEV_RTT_INIT_STATS_TAG = 127, /* htt_vdev_rtt_init_stats_tlv */
		HTT_STATS_PER_RATE_STATS_TAG = 128, /* htt_tx_rate_stats_per_tlv */
		HTT_STATS_MU_PPDU_DIST_TAG = 129, /* htt_pdev_mu_ppdu_dist_tlv */
		HTT_STATS_TX_PDEV_MUMIMO_GRP_STATS_TAG = 130, /* htt_tx_pdev_mumimo_grp_stats_tlv */

		HTT_STATS_MAX_TAG,
		} htt_tlv_tag_t;

fw/htt_ppdu_stats.h

+67 −10

Original line number	Diff line number	Diff line
		@@ -375,6 +375,13 @@ enum HTT_STATS_FTYPE {
		HTT_STATS_FTYPE_TIDQ_DATA_MU,
		HTT_STATS_FTYPE_SGEN_UL_BSR_RESP,
		HTT_STATS_FTYPE_SGEN_QOS_NULL,
		HTT_STATS_FTYPE_SGEN_BE_NDPA,
		HTT_STATS_FTYPE_SGEN_BE_NDP,
		HTT_STATS_FTYPE_SGEN_BE_MU_TRIG,
		HTT_STATS_FTYPE_SGEN_BE_MU_BAR,
		HTT_STATS_FTYPE_SGEN_BE_MU_BRP,
		HTT_STATS_FTYPE_SGEN_BE_MU_RTS,
		HTT_STATS_FTYPE_SGEN_BE_MU_BSRP,
		HTT_STATS_FTYPE_MAX,
		};
		typedef enum HTT_STATS_FTYPE HTT_STATS_FTYPE;
		@@ -1527,6 +1534,24 @@ typedef enum HTT_PPDU_STATS_RESP_PPDU_TYPE HTT_PPDU_STATS_RESP_PPDU_TYPE;
		((_var) \|= ((_val) << HTT_PPDU_STATS_USER_RATE_TLV_RESP_PPDU_TYPE_S)); \
		} while (0)

		typedef enum HTT_PPDU_STATS_RU_SIZE {
		HTT_PPDU_STATS_RU_26,
		HTT_PPDU_STATS_RU_52,
		HTT_PPDU_STATS_RU_52_26,
		HTT_PPDU_STATS_RU_106,
		HTT_PPDU_STATS_RU_106_26,
		HTT_PPDU_STATS_RU_242,
		HTT_PPDU_STATS_RU_484,
		HTT_PPDU_STATS_RU_484_242,
		HTT_PPDU_STATS_RU_996,
		HTT_PPDU_STATS_RU_996_484,
		HTT_PPDU_STATS_RU_996_484_242,
		HTT_PPDU_STATS_RU_996x2,
		HTT_PPDU_STATS_RU_996x2_484,
		HTT_PPDU_STATS_RU_996x3,
		HTT_PPDU_STATS_RU_996x3_484,
		HTT_PPDU_STATS_RU_996x4,
		} HTT_PPDU_STATS_RU_SIZE;

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;
		@@ -1546,37 +1571,69 @@ typedef struct {

		/* BIT [ 3 : 0] :- user_pos
		* BIT [ 11: 4] :- mu_group_id
		* BIT [ 31: 12] :- reserved1
		* BIT [ 15: 12] :- ru_format
		* BIT [ 31: 16] :- reserved1
		*/
		union {
		A_UINT32 mu_group_id__user_pos;
		struct {
		A_UINT32 user_pos: 4,
		mu_group_id: 8,
		reserved1: 20;
		ru_format: 4,
		reserved1: 16;
		};
		};

		/* BIT [ 15 : 0] :- ru_end
		* BIT [ 31 : 16] :- ru_start
		/* BIT [ 15 : 0] :- ru_end or ru_index
		* BIT [ 31 : 16] :- ru_start or ru_size
		*
		* Discriminant is field ru_format:
		* - ru_format = 0: ru_end, ru_start
		* - ru_format = 1: ru_index, ru_size
		* - ru_format = other: reserved for future expansion
		*
		* ru_start and ru_end are RU 26 indices
		*
		* ru_size is an HTT_PPDU_STATS_RU_SIZE, ru_index is a size
		* specific index for the given ru_size.
		*/
		union {
		A_UINT32 ru_start__ru_end;
		A_UINT32 ru_size__ru_index;
		struct {
		A_UINT32 ru_end: 16,
		ru_start: 16;
		};
		struct {
		A_UINT32 ru_index: 16,
		ru_size: 16;
		};
		};

		/* BIT [ 15 : 0] :- ru_end
		* BIT [ 31 : 16] :- ru_start
		/* BIT [ 15 : 0] :- resp_ru_end or resp_ru_index
		* BIT [ 31 : 16] :- resp_ru_start or resp_ru_size
		*
		* Discriminant is field ru_format:
		* - ru_format = 0: resp_ru_end, resp_ru_start
		* - ru_format = 1: resp_ru_index, resp_ru_size
		* - ru_format = other: reserved for future expansion
		*
		* resp_ru_start and resp_ru_end are RU 26 indices
		*
		* resp_ru_size is an HTT_PPDU_STATS_RU_SIZE, resp_ru_index
		* is a size specific index for the given ru_size.
		*/
		union {
		A_UINT32 resp_ru_start__ru_end;
		A_UINT32 resp_ru_size__ru_index;
		struct {
		A_UINT32 resp_ru_end: 16,
		resp_ru_start: 16;
		};
		struct {
		A_UINT32 resp_ru_index: 16,
		resp_ru_size: 16;
		};
		};

		/* BIT [ 0 : 0 ] :- resp_type_valid

fw/htt_stats.h

+200 −3

Original line number	Diff line number	Diff line
		@@ -26,6 +26,7 @@

		#include <htt_deps.h> /* A_UINT32 */
		#include <htt_common.h>
		#include <htt.h> /* HTT stats TLV struct def and tag defs */

		/*
		* htt_dbg_ext_stats_type -
		@@ -342,7 +343,7 @@ enum htt_dbg_ext_stats_type {
		* PARAMS:
		* - No Params
		* RESP MSG:
		* - htt_tx_pdev_rate_txbf_stats_t
		* - htt_tx_pdev_txbf_rate_stats_t
		*/
		HTT_DBG_EXT_STATS_PDEV_TX_RATE_TXBF = 31,

		@@ -402,6 +403,14 @@ enum htt_dbg_ext_stats_type {

		HTT_DBG_EXT_VDEV_RTT_INITIATOR_STATS = 39,

		/* HTT_DBG_EXT_PDEV_PER_STATS
		* PARAMS:
		* - No Params
		* RESP MSG:
		* - htt_tx_pdev_per_stats_t
		*/
		HTT_DBG_EXT_PDEV_PER_STATS = 40,


		/* keep this last */
		HTT_DBG_NUM_EXT_STATS = 256,
		@@ -632,7 +641,7 @@ typedef struct {
		A_UINT32 next_seq_cancel;
		/* Num of times fes offset was misaligned */
		A_UINT32 fes_offsets_err_cnt;
		/* Num of times peer blacklisted for MU-MIMO transmission */
		/* Num of times peer denylisted for MU-MIMO transmission */
		A_UINT32 num_mu_peer_blacklisted;
		/* Num of times mu_ofdma seq posted */
		A_UINT32 mu_ofdma_seq_posted;
		@@ -658,6 +667,10 @@ typedef struct {
		* 3 -> Tx Abort Module
		*/
		A_UINT32 last_suspend_reason;
		/* Num of dynamic mimo ps dlmumimo sequences posted */
		A_UINT32 num_dyn_mimo_ps_dlmumimo_sequences;
		/* Num of times su bf sequences are denylisted */
		A_UINT32 num_su_txbf_denylisted;
		} htt_tx_pdev_stats_cmn_tlv;

		#define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
		@@ -704,6 +717,49 @@ typedef struct {
		A_UINT32 num_data_ppdus_ax_su_txbf;
		} htt_tx_pdev_stats_tx_ppdu_stats_tlv_v;

		typedef enum {
		HTT_TX_WAL_ISR_SCHED_SUCCESS,
		HTT_TX_WAL_ISR_SCHED_FILTER,
		HTT_TX_WAL_ISR_SCHED_RESP_TIMEOUT,
		HTT_TX_WAL_ISR_SCHED_RATES_EXHAUSTED,
		HTT_TX_WAL_ISR_SCHED_DATA_EXHAUSTED,
		HTT_TX_WAL_ISR_SCHED_SEQ_ABORT,
		HTT_TX_WAL_ISR_SCHED_NOTIFY_FRAME_ENCOUNTERED,
		HTT_TX_WAL_ISR_SCHED_COMPLETION,
		HTT_TX_WAL_ISR_SCHED_IN_PROGRESS,
		} htt_tx_wal_tx_isr_sched_status;

		/* [0]- nr4 , [1]- nr8 */
		#define HTT_STATS_NUM_NR_BINS 2
		/* Termination status stated in htt_tx_wal_tx_isr_sched_status */
		#define HTT_STATS_MAX_NUM_SCHED_STATUS 9
		#define HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST 10
		#define HTT_STATS_MAX_NUM_SCHED_STATUS_WORDS \
		(HTT_STATS_NUM_NR_BINS * HTT_STATS_MAX_NUM_SCHED_STATUS)
		#define HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS \
		(HTT_STATS_NUM_NR_BINS * HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST)

		typedef enum {
		HTT_STATS_HWMODE_AC = 0,
		HTT_STATS_HWMODE_AX = 1,
		HTT_STATS_HWMODE_BE = 2,
		} htt_stats_hw_mode;

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;

		A_UINT32 hw_mode; /* HTT_STATS_HWMODE_xx */

		A_UINT32 mu_mimo_num_seq_term_status[HTT_STATS_MAX_NUM_SCHED_STATUS_WORDS];

		A_UINT32 mu_mimo_num_ppdu_completed_per_burst[HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS];

		A_UINT32 mu_mimo_num_seq_posted[HTT_STATS_NUM_NR_BINS];

		A_UINT32 mu_mimo_num_ppdu_posted_per_burst[HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS];

		} htt_pdev_mu_ppdu_dist_tlv_v;

		#define HTT_TX_PDEV_STATS_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
		/* NOTE: Variable length TLV, use length spec to infer array size .
		*
		@@ -741,6 +797,7 @@ typedef struct {
		* - HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG
		* - HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG
		* - HTT_STATS_PDEV_CTRL_PATH_TX_STATS_TAG
		* - HTT_STATS_MU_PPDU_DIST_TAG
		*/
		/* NOTE:
		* This structure is for documentation, and cannot be safely used directly.
		@@ -756,6 +813,7 @@ typedef struct _htt_tx_pdev_stats {
		htt_tx_pdev_stats_tx_ppdu_stats_tlv_v tx_su_tlv;
		htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v tried_mpdu_cnt_hist_tlv;
		htt_pdev_ctrl_path_tx_stats_tlv_v ctrl_path_tx_tlv;
		htt_pdev_mu_ppdu_dist_tlv_v mu_ppdu_dist_tlv;
		} htt_tx_pdev_stats_t;

		/* == SOC ERROR STATS == */
		@@ -1237,6 +1295,7 @@ typedef enum {
		#define HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS 4
		#define HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS 8
		#define HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
		#define HTT_TX_PEER_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */

		typedef struct _htt_tx_peer_rate_stats_tlv {
		htt_tlv_hdr_t tlv_hdr;
		@@ -1268,6 +1327,7 @@ typedef struct _htt_tx_peer_rate_stats_tlv {
		A_UINT32 tx_mu_mcs_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
		A_UINT32 tx_stbc_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
		A_UINT32 tx_gi_ext[HTT_TX_PEER_STATS_NUM_GI_COUNTERS][HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
		A_UINT32 reduced_tx_bw[HTT_TX_PEER_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PEER_STATS_NUM_BW_COUNTERS];
		} htt_tx_peer_rate_stats_tlv;

		#define HTT_RX_PEER_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
		@@ -1277,6 +1337,7 @@ typedef struct _htt_tx_peer_rate_stats_tlv {
		#define HTT_RX_PEER_STATS_NUM_BW_COUNTERS 4
		#define HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS 8
		#define HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
		#define HTT_RX_PEER_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */

		typedef struct _htt_rx_peer_rate_stats_tlv {
		htt_tlv_hdr_t tlv_hdr;
		@@ -1328,6 +1389,7 @@ typedef struct _htt_rx_peer_rate_stats_tlv {
		A_UINT32 rx_mcs_ext[HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
		A_UINT32 rx_stbc_ext[HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
		A_UINT32 rx_gi_ext[HTT_RX_PEER_STATS_NUM_GI_COUNTERS][HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
		A_UINT32 reduced_rx_bw[HTT_RX_PEER_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
		} htt_rx_peer_rate_stats_tlv;

		typedef enum {
		@@ -1755,10 +1817,36 @@ typedef enum {
		HTT_TX_SELFGEN_SCH_TSFLAG_ERROR_STATS_VALID = 8
		} htt_tx_selfgen_sch_tsflag_error_stats;

		typedef enum {
		HTT_TX_MUMIMO_GRP_VALID,
		HTT_TX_MUMIMO_GRP_INVALID_NUM_MU_USERS_EXCEEDED_MU_MAX_USERS,
		HTT_TX_MUMIMO_GRP_INVALID_SCHED_ALGO_NOT_MU_COMPATIBLE_GID,
		HTT_TX_MUMIMO_GRP_INVALID_NON_PRIMARY_GRP,
		HTT_TX_MUMIMO_GRP_INVALID_ZERO_CANDIDATES,
		HTT_TX_MUMIMO_GRP_INVALID_MORE_CANDIDATES,
		HTT_TX_MUMIMO_GRP_INVALID_GROUP_SIZE_EXCEED_NSS,
		HTT_TX_MUMIMO_GRP_INVALID_GROUP_INELIGIBLE,
		HTT_TX_MUMIMO_GRP_INVALID,
		HTT_TX_MUMIMO_GRP_INVALID_GROUP_EFF_MU_TPUT_OMBPS,
		HTT_TX_MUMIMO_GRP_INVALID_MAX_REASON_CODE,
		} htt_tx_mumimo_grp_invalid_reason_code_stats;

		#define HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS 4
		#define HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS 8
		#define HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS 74
		#define HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS 8
		#define HTT_STATS_MAX_MUMIMO_GRP_SZ 8
		/*
		* Each bin represents a 300 mbps throughput
		* [0] - 0-300mbps; [1] - 300-600mbps [2] - 600-900mbps; [3] - 900-1200mbps; [4] - 1200-1500mbps
		* [5] - 1500-1800mbps; [6] - 1800-2100mbps; [7] - 2100-2400mbps; [8] - 2400-2700mbps; [9] - >=2700mbps
		*/
		#define HTT_STATS_MUMIMO_TPUT_NUM_BINS 10
		#define HTT_STATS_MAX_INVALID_REASON_CODE \
		HTT_TX_MUMIMO_GRP_INVALID_MAX_REASON_CODE
		/* Reasons stated in htt_tx_mumimo_grp_invalid_reason_code_stats */
		#define HTT_TX_NUM_MUMIMO_GRP_INVALID_WORDS \
		(HTT_STATS_MAX_MUMIMO_GRP_SZ * HTT_STATS_MAX_INVALID_REASON_CODE)

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;
		@@ -2111,6 +2199,28 @@ typedef struct {
		A_UINT32 ax_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
		} htt_tx_pdev_mu_mimo_sch_stats_tlv;

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;
		A_UINT32 dl_mumimo_grp_best_grp_size[HTT_STATS_MAX_MUMIMO_GRP_SZ];

		A_UINT32 dl_mumimo_grp_best_num_usrs[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];

		A_UINT32 dl_mumimo_grp_eligible[HTT_STATS_MAX_MUMIMO_GRP_SZ];

		A_UINT32 dl_mumimo_grp_ineligible[HTT_STATS_MAX_MUMIMO_GRP_SZ];

		A_UINT32 dl_mumimo_grp_invalid[HTT_TX_NUM_MUMIMO_GRP_INVALID_WORDS];

		A_UINT32 dl_mumimo_grp_tputs[HTT_STATS_MUMIMO_TPUT_NUM_BINS];

		A_UINT32 ul_mumimo_grp_best_grp_size[HTT_STATS_MAX_MUMIMO_GRP_SZ];

		A_UINT32 ul_mumimo_grp_best_num_usrs[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];

		A_UINT32 ul_mumimo_grp_tputs[HTT_STATS_MUMIMO_TPUT_NUM_BINS];

		} htt_tx_pdev_mumimo_grp_stats_tlv;

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;
		A_UINT32 mu_mimo_sch_posted; /* Number of MU MIMO schedules posted to HW */
		@@ -2228,6 +2338,7 @@ typedef struct {
		* it can also hold MU-OFDMA stats.
		*/
		htt_tx_pdev_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_MAX_NUM_USERS */
		htt_tx_pdev_mumimo_grp_stats_tlv mumimo_grp_stats_tlv;
		} htt_tx_pdev_mu_mimo_stats_t;

		/* == TX SCHED STATS == */
		@@ -3439,6 +3550,8 @@ typedef enum {
		HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS = 5
		} HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_TYPE;

		#define HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;

		@@ -3545,6 +3658,13 @@ typedef struct {
		A_UINT32 tx_bw_320mhz;
		A_UINT32 tx_gi_ext_2[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
		A_UINT32 tx_su_punctured_mode[HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
		A_UINT32 reduced_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
		/* 11AC VHT DL MU MIMO TX BW stats at reduced channel config */
		A_UINT32 reduced_ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
		/* 11AX HE DL MU MIMO TX BW stats at reduced channel config */
		A_UINT32 reduced_ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
		/* 11AX HE DL MU OFDMA TX BW stats at reduced channel config */
		A_UINT32 reduced_ax_mu_ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
		} htt_tx_pdev_rate_stats_tlv;

		/* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE
		@@ -3622,6 +3742,8 @@ typedef enum {
		HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS = 5
		} HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_TYPE;

		#define HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;

		@@ -3771,6 +3893,7 @@ typedef struct {
		A_UINT32 rx_bw_ext[HTT_RX_PDEV_STATS_NUM_BW_EXT2_COUNTERS];
		A_UINT32 rx_gi_ext_2[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
		A_UINT32 rx_su_punctured_mode[HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
		A_UINT32 reduced_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
		} htt_rx_pdev_rate_ext_stats_tlv;

		/* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE_EXT
		@@ -3849,6 +3972,7 @@ typedef struct {
		* Trig power headroom for STA AID in same idx - UNIT(dB)
		*/
		A_UINT32 uplink_sta_power_headroom[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
		A_UINT32 reduced_ul_ofdma_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
		} htt_rx_pdev_ul_trigger_stats_tlv;

		/* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS
		@@ -3930,6 +4054,7 @@ typedef struct {
		A_INT8 rx_ul_mumimo_fd_rssi[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
		/* Average pilot EVM measued for RX UL TB PPDU */
		A_INT8 rx_ulmumimo_pilot_evm_dB_mean[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
		A_UINT32 reduced_ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
		} htt_rx_pdev_ul_mumimo_trig_stats_tlv;

		/* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS
		@@ -4621,6 +4746,34 @@ typedef struct {
		* ... where max_bw == 4 for 160mhz
		*/
		A_UINT32 sounding[HTT_TX_NUM_OF_SOUNDING_STATS_WORDS];

		/* cv upload handler stats */
		A_UINT32 cv_nc_mismatch_err;
		A_UINT32 cv_fcs_err;
		A_UINT32 cv_frag_idx_mismatch;
		A_UINT32 cv_invalid_peer_id;
		A_UINT32 cv_no_txbf_setup;
		A_UINT32 cv_expiry_in_update;
		A_UINT32 cv_pkt_bw_exceed;
		A_UINT32 cv_dma_not_done_err;
		A_UINT32 cv_update_failed;
		/* cv query stats */
		A_UINT32 cv_total_query;
		A_UINT32 cv_total_pattern_query;
		A_UINT32 cv_total_bw_query;
		A_UINT32 cv_invalid_bw_coding;
		A_UINT32 cv_forced_sounding;
		A_UINT32 cv_standalone_sounding;
		A_UINT32 cv_nc_mismatch;
		A_UINT32 cv_fb_type_mismatch;
		A_UINT32 cv_ofdma_bw_mismatch;
		A_UINT32 cv_bw_mismatch;
		A_UINT32 cv_pattern_mismatch;
		A_UINT32 cv_preamble_mismatch;
		A_UINT32 cv_nr_mismatch;
		A_UINT32 cv_in_use_cnt_exceeded;
		A_UINT32 cv_found;
		A_UINT32 cv_not_found;
		} htt_tx_sounding_stats_tlv;

		/* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
		@@ -4984,6 +5137,8 @@ typedef struct {
		#define HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS 14
		#define HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS 5 /* 20, 40, 80, 160, 320 */

		#define HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES 2/* 0: Half, 1: Quarter */

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;
		/* SU TxBF TX MCS stats */
		@@ -5006,8 +5161,45 @@ typedef struct {
		A_UINT32 tx_su_ol_bw[HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
		/* Legacy and OFDM TX rate stats */
		A_UINT32 tx_legacy_ofdm_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
		/* SU TxBF TX BW stats */
		A_UINT32 reduced_tx_su_txbf_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
		/* Implicit BF TX BW stats */
		A_UINT32 reduced_tx_su_ibf_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
		/* Open loop TX BW stats */
		A_UINT32 reduced_tx_su_ol_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
		} htt_tx_pdev_txbf_rate_stats_tlv;

		typedef enum {
		HTT_STATS_RC_MODE_DLSU = 0,
		HTT_STATS_RC_MODE_DLMUMIMO = 1,
		} htt_stats_rc_mode;

		typedef struct {
		A_UINT32 ppdus_tried;
		A_UINT32 ppdus_ack_failed;
		A_UINT32 mpdus_tried;
		A_UINT32 mpdus_failed;
		} htt_tx_rate_stats_t;

		typedef struct {
		htt_tlv_hdr_t tlv_hdr;

		A_UINT32 rc_mode; /* HTT_STATS_RC_MODE_XX */

		A_UINT32 last_probed_mcs;

		A_UINT32 last_probed_nss;

		A_UINT32 last_probed_bw;

		htt_tx_rate_stats_t per_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];

		htt_tx_rate_stats_t per_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];

		htt_tx_rate_stats_t per_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];

		} htt_tx_rate_stats_per_tlv;

		/* NOTE:
		* This structure is for documentation, and cannot be safely used directly.
		* Instead, use the constituent TLV structures to fill/parse.
		@@ -5016,6 +5208,10 @@ typedef struct {
		htt_tx_pdev_txbf_rate_stats_tlv txbf_rate_stats;
		} htt_pdev_txbf_rate_stats_t;

		typedef struct {
		htt_tx_rate_stats_per_tlv per_stats;
		} htt_tx_pdev_per_stats_t;

		typedef enum {
		HTT_ULTRIG_QBOOST_TRIGGER = 0,
		HTT_ULTRIG_PSPOLL_TRIGGER,
		@@ -5055,6 +5251,7 @@ typedef enum {
		#define HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS 14
		/* Counters BW 20,40,80,160,320 */
		#define HTT_STA_UL_OFDMA_NUM_BW_COUNTERS 5
		#define HTT_STA_UL_OFDMA_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */

		/* STATS_TYPE : HTT_DBG_EXT_STA_11AX_UL_STATS
		* TLV_TAGS:
		@@ -5108,7 +5305,7 @@ typedef struct {
		A_UINT32 current_cw_max[HTT_NUM_AC_WMM];
		/* AIFS value - 0 -255 */
		A_UINT32 current_aifs[HTT_NUM_AC_WMM];

		A_UINT32 reduced_ul_ofdma_tx_bw[HTT_STA_UL_OFDMA_NUM_REDUCED_CHAN_TYPES][HTT_STA_UL_OFDMA_NUM_BW_COUNTERS];
		} htt_sta_ul_ofdma_stats_tlv;

		/* NOTE:

fw/wmi_unified.h

+83 −27

Original line number	Diff line number	Diff line
		@@ -3938,7 +3938,36 @@ typedef struct {
		* Refer to the below definitions of the
		* WMI_RSRC_CFG_HOST_SERVICE_FLAG_REG_CC_EXT_SUPPORT_GET
		* and _SET macros.
		* Bits 31:5 - Reserved
		* Bit 5
		* This bit will be set when the host supports NAN channels.
		* Refer to WMI_RSRC_CFG_HOST_SERVICE_FLAG_NAN_CHANNEL_SUPPORT_GET/SET
		* Bit 6
		* This bit will be set when the host supports synchronous TWT events.
		* Refer to WMI_RSRC_CFG_HOST_SERVICE_FLAG_STA_TWT_SYNC_EVT_SUPPORT_GET
		* and _SET.
		* Bit 7
		* This bit will be set when host supports both LPI and SP mode.
		* when this bit is set to 0 - Indicate LPI only mode
		* when set to 1 - Indicate both SP mode and LPI mode
		* both are supported
		* Refer to the below definitions of the
		* WMI_RSRC_CFG_HOST_SERVICE_FLAG_LPI_SP_MODE_SUPPORT_GET
		* and _SET macros.
		* Bit 8
		* This bit will be set when host wants to disable timer check in
		* reg for AFC.
		* when set to 1 - Disable timer check
		* Refer to the below definitions of the
		* WMI_RSRC_CFG_HOST_SERVICE_FLAG_REG_DISCARD_TIMER_CHECK_GET
		* and _SET macros.
		* Bit 9
		* This bit will be set when host host wants to disable request id
		* check in reg for AFC.
		* when set to 1 - Disable Request ID check
		* Refer to the below definitions of the
		* WMI_RSRC_CFG_HOST_SERVICE_FLAG_REG_DISCARD_REQ_ID_CHECK_GET
		* and _SET macros.
		* Bits 31:10 - Reserved
		*/
		A_UINT32 host_service_flags;

		@@ -4257,6 +4286,21 @@ typedef struct {
		#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_STA_TWT_SYNC_EVT_SUPPORT_SET(host_service_flags, val) \
		WMI_SET_BITS(host_service_flags, 6, 1, val)

		#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_LPI_SP_MODE_SUPPORT_GET(host_service_flags) \
		WMI_GET_BITS(host_service_flags, 7, 1)
		#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_LPI_SP_MODE_SUPPORT_SET(host_service_flags, val) \
		WMI_SET_BITS(host_service_flags, 7, 1, val)

		#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_REG_DISCARD_AFC_TIMER_CHECK_GET(host_service_flags) \
		WMI_GET_BITS(host_service_flags, 8, 1)
		#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_REG_DISCARD_AFC_TIMER_CHECK_SET(host_service_flags, val) \
		WMI_SET_BITS(host_service_flags, 8, 1, val)

		#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_REG_DISCARD_AFC_REQ_ID_CHECK_GET(host_service_flags) \
		WMI_GET_BITS(host_service_flags, 9, 1)
		#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_REG_DISCARD_AFC_REQ_ID_CHECK_SET(host_service_flags, val) \
		WMI_SET_BITS(host_service_flags, 9, 1, val)

		typedef struct {
		A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_init_cmd_fixed_param */

		@@ -5116,6 +5160,7 @@ typedef struct {
		* link flags: refer WMI_ROAM_LINK_FLAG_XXX.
		*/
		A_UINT32 flags;
		wmi_mac_addr link_addr; /* link address */
		} wmi_roam_ml_setup_links_param;

		/*
		@@ -14611,7 +14656,13 @@ typedef struct {
		#define WMI_PEER_AUTH 0x00000001 /* Authorized for data */
		#define WMI_PEER_QOS 0x00000002 /* QoS enabled */
		#define WMI_PEER_NEED_PTK_4_WAY 0x00000004 /* Needs PTK 4 way handshake for authorization */
		#define WMI_PEER_GK_INST 0x00000008 /* group Key Installed */
		#define WMI_PEER_NEED_GTK_2_WAY 0x00000010 /* Needs GTK 2 way handshake after 4-way handshake */
		#define WMI_PEER_PRIV 0x00000020 /* Encryption Enabled */
		#define WMI_PEER_PK_INST 0x00000040 /* Pairwise Key Installed */
		#define WMI_PEER_TKIP_CM_ENABLED 0x00000080 /* TKIP CounterMeasures */
		#define WMI_PEER_SW_DEMIC_FRAG 0x00000100 /* S/W Demic of Frag Train */
		#define WMI_PEER_CCX_ENABLED 0x00000200 /* CCX enabled */
		#define WMI_PEER_HE 0x00000400 /* HE Enabled */
		#define WMI_PEER_APSD 0x00000800 /* U-APSD power save enabled */
		#define WMI_PEER_HT 0x00001000 /* HT enabled */
		@@ -14621,6 +14672,10 @@ typedef struct {
		#define WMI_PEER_LDPC 0x00010000 /* LDPC ENabled */
		#define WMI_PEER_DYN_MIMOPS 0x00020000 /* Dynamic MIMO PS Enabled */
		#define WMI_PEER_STATIC_MIMOPS 0x00040000 /* Static MIMO PS enabled */
		#define WMI_PEER_DIS_MIMOPS 0x00080000 /* MIMO PS DISABLED */
		#define WMI_PEER_SPATIAL_EXP 0x00100000 /* Enable spatial expansion for
		* single stream rates to avoid
		* unintentional beamforming */
		#define WMI_PEER_SPATIAL_MUX 0x00200000 /* SM Enabled */
		#define WMI_PEER_TWT_REQ 0x00400000 /* TWT Requester Support bit in Extended Capabilities element */
		#define WMI_PEER_TWT_RESP 0x00800000 /* TWT Responder Support bit in Extended Capabilities element */
		@@ -14628,7 +14683,7 @@ typedef struct {
		#define WMI_PEER_VHT 0x02000000 /* VHT Enabled */
		#define WMI_PEER_80MHZ 0x04000000 /* 80MHz enabld */
		#define WMI_PEER_PMF 0x08000000 /* Robust Management Frame Protection enabled */
		/** CAUTION TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000. Need to be clean up */
		#define WMI_PEER_F_PS_PRESEND_REQUIRED 0x10000000 /* Use this flag to avoid calling powersave API when STA is awake */
		#define WMI_PEER_IS_P2P_CAPABLE 0x20000000 /* P2P capable peer */
		#define WMI_PEER_160MHZ 0x40000000 /* 160 MHz enabled */
		#define WMI_PEER_SAFEMODE_EN 0x80000000 /* Fips Mode Enabled */
		@@ -14636,6 +14691,7 @@ typedef struct {
		/** define for peer_flags_ext */
		#define WMI_PEER_EXT_EHT 0x00000001 /* EHT enabled */
		#define WMI_PEER_EXT_320MHZ 0x00000002 /* 320Mhz enabled */
		#define WMI_PEER_EXT_F_CRIT_PROTO_HINT_ENABLED 0x40000000

		/**
		* Peer rate capabilities.

fw/wmi_version.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -36,7 +36,7 @@
		#define __WMI_VER_MINOR_ 0
		/** WMI revision number has to be incremented when there is a
		* change that may or may not break compatibility. */
		#define __WMI_REVISION_ 1043
		#define __WMI_REVISION_ 1046

		/** The Version Namespace should not be normally changed. Only
		* host and firmware of the same WMI namespace will work