Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9ef527fa authored by Sunil Khatri's avatar Sunil Khatri Committed by Raghu Ananya Arabolu
Browse files

msm: kgsl: Add support for A618 GPU 



Add support of new GPU ID and required configuration
of it in the graphics driver to support A618 GPU.

Change-Id: I34361f45c528f724ae76f8f5a9651a32eaa9c838
Signed-off-by: default avatarSunil Khatri <sunilkh@codeaurora.org>
parent 1f57fa2d

drivers/gpu/msm/adreno-gpulist.h

+19 −0
Original line number Diff line number Diff line
@@ -372,6 +372,25 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.gpmu_major = 0x1,

		.gpmu_minor = 0x003,

	},

	{

		.gpurev = ADRENO_REV_A618,

		.core = 6,

		.major = 1,

		.minor = 8,

		.patchid = ANY_ID,

		.features = ADRENO_64BIT | ADRENO_RPMH | ADRENO_PREEMPTION |

			ADRENO_GPMU | ADRENO_CONTENT_PROTECTION | ADRENO_IFPC |

			ADRENO_IOCOHERENT,

		.sqefw_name = "a630_sqe.fw",

		.zap_name = "a615_zap",

		.gpudev = &adreno_a6xx_gpudev,

		.gmem_size = SZ_512K,

		.num_protected_regs = 0x20,

		.busy_mask = 0xFFFFFFFE,

		.gpmufw_name = "a630_gmu.bin",

		.gpmu_major = 0x1,

		.gpmu_minor = 0x003,

	},

	{

		.gpurev = ADRENO_REV_A640,

		.core = 6,

drivers/gpu/msm/adreno.h

+14 −4
Original line number Diff line number Diff line
@@ -212,6 +212,7 @@ enum adreno_gpurev { 
	ADRENO_REV_A608 = 608,

	ADRENO_REV_A615 = 615,

	ADRENO_REV_A616 = 616,

	ADRENO_REV_A618 = 618,

	ADRENO_REV_A630 = 630,

	ADRENO_REV_A640 = 640,

	ADRENO_REV_A680 = 680,
@@ -1278,12 +1279,22 @@ static inline int adreno_is_a6xx(struct adreno_device *adreno_dev) 
}



ADRENO_TARGET(a608, ADRENO_REV_A608)

ADRENO_TARGET(a615, ADRENO_REV_A615)

ADRENO_TARGET(a616, ADRENO_REV_A616)

ADRENO_TARGET(a630, ADRENO_REV_A630)

ADRENO_TARGET(a640, ADRENO_REV_A640)

ADRENO_TARGET(a680, ADRENO_REV_A680)



/*

 * All the derived chipsets from A615 needs to be added to this

 * list such as A616, A618 etc.

 */

static inline int adreno_is_a615_family(struct adreno_device *adreno_dev)

{

	unsigned int rev = ADRENO_GPUREV(adreno_dev);



	return (rev == ADRENO_REV_A615 || rev == ADRENO_REV_A616 ||

			rev == ADRENO_REV_A618);

}



static inline int adreno_is_a630v1(struct adreno_device *adreno_dev)

{

	return (ADRENO_GPUREV(adreno_dev) == ADRENO_REV_A630) &&
@@ -1913,8 +1924,7 @@ static inline void adreno_perfcntr_active_oob_put(struct kgsl_device *device) 


static inline bool adreno_has_sptprac_gdsc(struct adreno_device *adreno_dev)

{

	if (adreno_is_a615(adreno_dev) || adreno_is_a630(adreno_dev) ||

		adreno_is_a616(adreno_dev))

	if (adreno_is_a630(adreno_dev) || adreno_is_a615_family(adreno_dev))

		return true;

	else

		return false;

drivers/gpu/msm/adreno_a6xx.c

+7 −11
Original line number Diff line number Diff line
@@ -58,11 +58,10 @@ static const struct adreno_vbif_data a640_gbif[] = { 


static const struct adreno_vbif_platform a6xx_vbif_platforms[] = {

	{ adreno_is_a630, a630_vbif },

	{ adreno_is_a615, a615_gbif },

	{ adreno_is_a615_family, a615_gbif },

	{ adreno_is_a640, a640_gbif },

	{ adreno_is_a680, a640_gbif },

	{ adreno_is_a608, a615_gbif },

	{ adreno_is_a616, a615_gbif },

};



struct kgsl_hwcg_reg {
@@ -353,11 +352,10 @@ static const struct { 
	unsigned int count;

} a6xx_hwcg_registers[] = {

	{adreno_is_a630, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)},

	{adreno_is_a615, a615_hwcg_regs, ARRAY_SIZE(a615_hwcg_regs)},

	{adreno_is_a615_family, a615_hwcg_regs, ARRAY_SIZE(a615_hwcg_regs)},

	{adreno_is_a640, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)},

	{adreno_is_a680, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)},

	{adreno_is_a608, a608_hwcg_regs, ARRAY_SIZE(a608_hwcg_regs)},

	{adreno_is_a616, a615_hwcg_regs, ARRAY_SIZE(a615_hwcg_regs)},

};



static struct a6xx_protected_regs {
@@ -604,7 +602,7 @@ __get_gmu_ao_cgc_mode_cntl(struct adreno_device *adreno_dev) 
{

	if (adreno_is_a608(adreno_dev))

		return 0x00000022;

	if (adreno_is_a615(adreno_dev) || adreno_is_a616(adreno_dev))

	else if (adreno_is_a615_family(adreno_dev))

		return 0x00000222;

	else

		return 0x00020202;
@@ -615,7 +613,7 @@ __get_gmu_ao_cgc_delay_cntl(struct adreno_device *adreno_dev) 
{

	if (adreno_is_a608(adreno_dev))

		return 0x00000011;

	if (adreno_is_a615(adreno_dev) || adreno_is_a616(adreno_dev))

	else if (adreno_is_a615_family(adreno_dev))

		return 0x00000111;

	else

		return 0x00010111;
@@ -626,7 +624,7 @@ __get_gmu_ao_cgc_hyst_cntl(struct adreno_device *adreno_dev) 
{

	if (adreno_is_a608(adreno_dev))

		return 0x00000055;

	if (adreno_is_a615(adreno_dev) || adreno_is_a616(adreno_dev))

	else if (adreno_is_a615_family(adreno_dev))

		return 0x00000555;

	else

		return 0x00005555;
@@ -740,8 +738,7 @@ static void a6xx_patch_pwrup_reglist(struct adreno_device *adreno_dev) 
		+ sizeof(a6xx_ifpc_pwrup_reglist), a6xx_pwrup_reglist,

		sizeof(a6xx_pwrup_reglist));



	if (adreno_is_a615(adreno_dev) || adreno_is_a608(adreno_dev) ||

		adreno_is_a616(adreno_dev)) {

	if (adreno_is_a615_family(adreno_dev) || adreno_is_a608(adreno_dev)) {

		for (i = 0; i < ARRAY_SIZE(a615_pwrup_reglist); i++) {

			r = &a615_pwrup_reglist[i];

			kgsl_regread(KGSL_DEVICE(adreno_dev),
@@ -2691,9 +2688,8 @@ static const struct { 
	int (*check)(struct adreno_device *adreno_dev);

	void (*func)(struct adreno_device *adreno_dev);

} a6xx_efuse_funcs[] = {

	{ adreno_is_a615, a6xx_efuse_speed_bin },

	{ adreno_is_a615_family, a6xx_efuse_speed_bin },

	{ adreno_is_a608, a6xx_efuse_speed_bin },

	{ adreno_is_a616, a6xx_efuse_speed_bin },

};



static void a6xx_check_features(struct adreno_device *adreno_dev)

drivers/gpu/msm/adreno_a6xx_gmu.c

+2 −4
Original line number Diff line number Diff line
@@ -522,8 +522,7 @@ static int a6xx_gmu_oob_set(struct kgsl_device *device, 
	if (!gmu_core_isenabled(device))

		return 0;



	if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev) &&

		!adreno_is_a616(adreno_dev)) {

	if (!adreno_is_a630(adreno_dev) && !adreno_is_a615_family(adreno_dev)) {

		set = BIT(30 - req * 2);

		check = BIT(31 - req);
@@ -576,8 +575,7 @@ static inline void a6xx_gmu_oob_clear(struct kgsl_device *device, 
	if (!gmu_core_isenabled(device))

		return;



	if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev) &&

		!adreno_is_a616(adreno_dev)) {

	if (!adreno_is_a630(adreno_dev) && !adreno_is_a615_family(adreno_dev)) {

		clear = BIT(31 - req * 2);

		if (req >= 6) {

			dev_err(&gmu->pdev->dev,

drivers/gpu/msm/adreno_a6xx_snapshot.c

+2 −3
Original line number Diff line number Diff line
@@ -1141,8 +1141,7 @@ static size_t a6xx_snapshot_dbgc_debugbus_block(struct kgsl_device *device, 


	block_id = block->block_id;

	/* GMU_GX data is read using the GMU_CX block id on A630 */

	if ((adreno_is_a630(adreno_dev) || adreno_is_a615(adreno_dev) ||

		adreno_is_a616(adreno_dev)) &&

	if ((adreno_is_a630(adreno_dev) || adreno_is_a615_family(adreno_dev)) &&

		(block_id == A6XX_DBGBUS_GMU_GX))

		block_id = A6XX_DBGBUS_GMU_CX;
@@ -1546,7 +1545,7 @@ void a6xx_snapshot(struct adreno_device *adreno_dev, 
			snapshot, a6xx_snapshot_registers, &a6xx_reg_list[i]);

	}



	if (adreno_is_a615(adreno_dev) || adreno_is_a630(adreno_dev))

	if (adreno_is_a615_family(adreno_dev) || adreno_is_a630(adreno_dev))

		adreno_snapshot_registers(device, snapshot,

			a630_rscc_snapshot_registers,

			ARRAY_SIZE(a630_rscc_snapshot_registers) / 2);