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Commit 9ef4dcdd authored by Pankaj Gupta's avatar Pankaj Gupta Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add "smmu_vote" clock to GPU clock list for Lito 

Add "smmu_vote" clock to GPU clock list to allow SW vote for MMU
clock ON request. This clock ensure that GCC based HW clock gating
is disabled for graphics smmu.

Change-Id: Ie7e4da04ed17f82a479ad13feb1d92eef7084948
parent 5c879dbe

qcom/lito-gpu.dtsi

+9 −6
Original line number Diff line number Diff line
@@ -83,11 +83,12 @@ 
			<&gcc GCC_DDRSS_GPU_AXI_CLK>,

			<&gcc GCC_GPU_MEMNOC_GFX_CLK>,

			<&gpucc GPU_CC_CX_GMU_CLK>,

			<&gpucc GPU_CC_AHB_CLK>;

			<&gpucc GPU_CC_AHB_CLK>,

			<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;



		clock-names = "rbbmtimer_clk", "mem_clk",

				"mem_iface_clk", "gmu_clk",

				"gpu_cc_ahb";

				"gpu_cc_ahb", "smmu_vote";



		qcom,isense-clk-on-level = <1>;
@@ -235,11 +236,12 @@ 


		clocks =<&gcc GCC_GPU_MEMNOC_GFX_CLK>,

			<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,

			<&gpucc GPU_CC_AHB_CLK>;

			<&gpucc GPU_CC_AHB_CLK>,

			<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;



		clock-names = "gcc_gpu_memnoc_gfx",

			"gcc_gpu_snoc_dvm_gfx",

			"gpu_cc_ahb";

			"gpu_cc_ahb", "smmu_vote";



		qcom,secure_align_mask = <0xfff>;

		qcom,retention;
@@ -291,10 +293,11 @@ 
				<&gpucc GPU_CC_CXO_CLK>,

				<&gcc GCC_DDRSS_GPU_AXI_CLK>,

				<&gcc GCC_GPU_MEMNOC_GFX_CLK>,

				<&gpucc GPU_CC_AHB_CLK>;

				<&gpucc GPU_CC_AHB_CLK>,

				<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;



		clock-names = "gmu_clk", "cxo_clk", "axi_clk",

				"memnoc_clk", "gpu_cc_ahb";

				"memnoc_clk", "gpu_cc_ahb", "smmu_vote";



		/* AOP mailbox for sending ACD enable and disable messages */

		mboxes = <&qmp_aop 0>;