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Commit 9eebfdbf authored by Jani Nikula's avatar Jani Nikula
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drm/i915: simplify check for I915G/I945G in bit 6 swizzling detection 



Commit c9c4b6f6 ("drm/i915: fix swizzle detection for gen3") added a
complicated check for I915G/I945G. Pineview and other gen3 devices match
IS_MOBILE() anyway. Simplify.

Cc: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1481627459-488-1-git-send-email-jani.nikula@intel.com
parent 2dd85aeb

drivers/gpu/drm/i915/i915_gem_fence_reg.c

+1 −2
Original line number Diff line number Diff line
@@ -513,8 +513,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv) 
		swizzle_x = I915_BIT_6_SWIZZLE_NONE;

		swizzle_y = I915_BIT_6_SWIZZLE_NONE;

	} else if (IS_MOBILE(dev_priv) ||

		   (IS_GEN3(dev_priv) &&

		    !IS_G33(dev_priv) && !IS_PINEVIEW(dev_priv))) {

		   IS_I915G(dev_priv) || IS_I945G(dev_priv)) {

		uint32_t dcc;



		/* On 9xx chipsets, channel interleave by the CPU is