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Commit 9edb4b13 authored by Stephen Boyd's avatar Stephen Boyd Committed by Kumar Gala
Browse files

ARM: debug: msm: Support big-endian CPUs 



If the CPU is in big-endian mode these macros will access the
hardware incorrectly. Reverse thins as necessary to fix this.

Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarKumar Gala <galak@codeaurora.org>
parent 30cd6552

arch/arm/include/debug/msm.S

+6 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
	.endm



	.macro	senduart, rd, rx

ARM_BE8(rev	\rd, \rd )

#ifdef CONFIG_DEBUG_QCOM_UARTDM

	@ Write the 1 character to UARTDM_TF

	str	\rd, [\rx, #0x70]
@@ -35,24 +36,29 @@ 
#ifdef CONFIG_DEBUG_QCOM_UARTDM

	@ check for TX_EMT in UARTDM_SR

	ldr	\rd, [\rx, #0x08]

ARM_BE8(rev     \rd, \rd )

	tst	\rd, #0x08

	bne	1002f

	@ wait for TXREADY in UARTDM_ISR

1001:	ldr	\rd, [\rx, #0x14]

ARM_BE8(rev     \rd, \rd )

	tst	\rd, #0x80

	beq 	1001b

1002:

	@ Clear TX_READY by writing to the UARTDM_CR register

	mov	\rd, #0x300

ARM_BE8(rev     \rd, \rd )

	str	\rd, [\rx, #0x10]

	@ Write 0x1 to NCF register

	mov 	\rd, #0x1

ARM_BE8(rev     \rd, \rd )

	str	\rd, [\rx, #0x40]

	@ UARTDM reg. Read to induce delay

	ldr	\rd, [\rx, #0x08]

#else

	@ wait for TX_READY

1001:	ldr	\rd, [\rx, #0x08]

ARM_BE8(rev     \rd, \rd )

	tst	\rd, #0x04

	beq	1001b

#endif