Loading include/dt-bindings/msm/msm-bus-ids.h +19 −19 Original line number Diff line number Diff line Loading @@ -1152,23 +1152,23 @@ #define ICBID_SLAVE_PCNOC_S_10 245 #define ICBID_SLAVE_PCNOC_S_11 246 #define ICBID_SLAVE_LPASS_ANOC_BIMC 247 #define ICBID_SLAVE_SNOC_BIMC_NRT 248 #define ICBID_SLAVE_SNOC_BIMC_RT 249 #define ICBID_SLAVE_QUP_0 250 #define ICBID_SLAVE_UFS_MEM_CFG 251 #define ICBID_SLAVE_VSENSE_CTRL_CFG 252 #define ICBID_SLAVE_QUP_CORE_0 253 #define ICBID_SLAVE_QUP_CORE_1 254 #define ICBID_SLAVE_GPU_CDSP_BIMC 255 #define ICBID_SLAVE_AHB2PHY_USB 256 #define ICBID_SLAVE_APSS_THROTTLE_CFG 257 #define ICBID_SLAVE_CAMERA_NRT_THROTTLE_CFG 258 #define ICBID_SLAVE_CDSP_THROTTLE_CFG 259 #define ICBID_SLAVE_DDR_PHY_CFG 260 #define ICBID_SLAVE_DDR_SS_CFG 261 #define ICBID_SLAVE_GPU_CFG 262 #define ICBID_SLAVE_GPU_THROTTLE_CFG 263 #define ICBID_SLAVE_MAPSS 264 #define ICBID_SLAVE_MDSP_MPU_CFG 265 #define ICBID_SLAVE_CAMERA_RT_THROTTLE_CFG 266 #define ICBID_SLAVE_SNOC_BIMC_NRT 259 #define ICBID_SLAVE_SNOC_BIMC_RT 260 #define ICBID_SLAVE_QUP_0 261 #define ICBID_SLAVE_UFS_MEM_CFG 262 #define ICBID_SLAVE_VSENSE_CTRL_CFG 263 #define ICBID_SLAVE_QUP_CORE_0 264 #define ICBID_SLAVE_QUP_CORE_1 265 #define ICBID_SLAVE_GPU_CDSP_BIMC 266 #define ICBID_SLAVE_AHB2PHY_USB 268 #define ICBID_SLAVE_APSS_THROTTLE_CFG 270 #define ICBID_SLAVE_CAMERA_NRT_THROTTLE_CFG 271 #define ICBID_SLAVE_CDSP_THROTTLE_CFG 272 #define ICBID_SLAVE_DDR_PHY_CFG 273 #define ICBID_SLAVE_DDR_SS_CFG 274 #define ICBID_SLAVE_GPU_CFG 275 #define ICBID_SLAVE_GPU_THROTTLE_CFG 276 #define ICBID_SLAVE_MAPSS 277 #define ICBID_SLAVE_MDSP_MPU_CFG 278 #define ICBID_SLAVE_CAMERA_RT_THROTTLE_CFG 279 #endif Loading
include/dt-bindings/msm/msm-bus-ids.h +19 −19 Original line number Diff line number Diff line Loading @@ -1152,23 +1152,23 @@ #define ICBID_SLAVE_PCNOC_S_10 245 #define ICBID_SLAVE_PCNOC_S_11 246 #define ICBID_SLAVE_LPASS_ANOC_BIMC 247 #define ICBID_SLAVE_SNOC_BIMC_NRT 248 #define ICBID_SLAVE_SNOC_BIMC_RT 249 #define ICBID_SLAVE_QUP_0 250 #define ICBID_SLAVE_UFS_MEM_CFG 251 #define ICBID_SLAVE_VSENSE_CTRL_CFG 252 #define ICBID_SLAVE_QUP_CORE_0 253 #define ICBID_SLAVE_QUP_CORE_1 254 #define ICBID_SLAVE_GPU_CDSP_BIMC 255 #define ICBID_SLAVE_AHB2PHY_USB 256 #define ICBID_SLAVE_APSS_THROTTLE_CFG 257 #define ICBID_SLAVE_CAMERA_NRT_THROTTLE_CFG 258 #define ICBID_SLAVE_CDSP_THROTTLE_CFG 259 #define ICBID_SLAVE_DDR_PHY_CFG 260 #define ICBID_SLAVE_DDR_SS_CFG 261 #define ICBID_SLAVE_GPU_CFG 262 #define ICBID_SLAVE_GPU_THROTTLE_CFG 263 #define ICBID_SLAVE_MAPSS 264 #define ICBID_SLAVE_MDSP_MPU_CFG 265 #define ICBID_SLAVE_CAMERA_RT_THROTTLE_CFG 266 #define ICBID_SLAVE_SNOC_BIMC_NRT 259 #define ICBID_SLAVE_SNOC_BIMC_RT 260 #define ICBID_SLAVE_QUP_0 261 #define ICBID_SLAVE_UFS_MEM_CFG 262 #define ICBID_SLAVE_VSENSE_CTRL_CFG 263 #define ICBID_SLAVE_QUP_CORE_0 264 #define ICBID_SLAVE_QUP_CORE_1 265 #define ICBID_SLAVE_GPU_CDSP_BIMC 266 #define ICBID_SLAVE_AHB2PHY_USB 268 #define ICBID_SLAVE_APSS_THROTTLE_CFG 270 #define ICBID_SLAVE_CAMERA_NRT_THROTTLE_CFG 271 #define ICBID_SLAVE_CDSP_THROTTLE_CFG 272 #define ICBID_SLAVE_DDR_PHY_CFG 273 #define ICBID_SLAVE_DDR_SS_CFG 274 #define ICBID_SLAVE_GPU_CFG 275 #define ICBID_SLAVE_GPU_THROTTLE_CFG 276 #define ICBID_SLAVE_MAPSS 277 #define ICBID_SLAVE_MDSP_MPU_CFG 278 #define ICBID_SLAVE_CAMERA_RT_THROTTLE_CFG 279 #endif