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Commit 9e8510e9 authored by Rama Aparna Mallavarapu's avatar Rama Aparna Mallavarapu
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ARM: dts: qcom: Add clocks needed for NPU BWMON devices for kona 

NPU BWMON and NPU DSP BWMON devices requires BWMON AHB
cfg clk and AXI cfg clocks. Add the device tree entries
needed to enable them.

Change-Id: Ic520bb4249e2367c7683e3e12812590c1e77be18
parent eabdf1c5

qcom/kona.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -1079,6 +1079,10 @@ 
		compatible = "qcom,bimc-bwmon4";

		reg = <0x00060400 0x300>, <0x00060300 0x200>;

		reg-names = "base", "global_base";

		clocks = <&clock_gcc GCC_NPU_BWMON_CFG_AHB_CLK>,

				<&clock_gcc GCC_NPU_BWMON_AXI_CLK>;

		clock-names = "npu_bwmon_ahb", "npu_bwmon_axi";

		qcom,bwmon_clks = "npu_bwmon_ahb", "npu_bwmon_axi";

		interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;

		qcom,mport = <0>;

		qcom,hw-timer-hz = <19200000>;
@@ -1097,6 +1101,10 @@ 
		compatible = "qcom,bimc-bwmon4";

		reg = <0x00070300 0x300>, <0x00070200 0x200>;

		reg-names = "base", "global_base";

		clocks = <&clock_gcc GCC_NPU_BWMON_CFG_AHB_CLK>,

				<&clock_gcc GCC_NPU_BWMON_AXI_CLK>;

		clock-names = "npu_bwmon_ahb", "npu_bwmon_axi";

		qcom,bwmon_clks = "npu_bwmon_ahb", "npu_bwmon_axi";

		interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;

		qcom,mport = <0>;

		qcom,hw-timer-hz = <19200000>;