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Commit 9e496f3c authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add GPU mempool configuration for Scuba 32bit"

parents 490226e1 71c27339
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+35 −0
Original line number Diff line number Diff line
@@ -200,6 +200,41 @@
			};
		};

		/* GPU Mempool configuration for low memory SKUs */
		qcom,gpu-mempools-lowmem {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "qcom,gpu-mempools-lowmem";

			/* 4K Page Pool configuration */
			qcom,gpu-mempool@0 {
				reg = <0>;
				qcom,mempool-page-size = <4096>;
				qcom,mempool-allocate;
			};
			/* 8K Page Pool configuration */
			qcom,gpu-mempool@1 {
				reg = <1>;
				qcom,mempool-page-size = <8192>;
				qcom,mempool-allocate;
			};
			/* 64K Page Pool configuration */
			qcom,gpu-mempool@2 {
				reg = <2>;
				qcom,mempool-page-size = <65536>;
				qcom,mempool-allocate;
				qcom,mempool-max-pages = <256>;
			};
			/* 1M Page Pool configuration */
			qcom,gpu-mempool@3 {
				reg = <3>;
				qcom,mempool-page-size = <1048576>;
				qcom,mempool-allocate;
				qcom,mempool-max-pages = <32>;
			};
		};


		/* Power Levels
		 * Speed-bin zero is default speed bin.
		 * For rest of the speed bins, speed-bin value