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Commit 9e42b263 authored by Shawn Guo's avatar Shawn Guo
Browse files

drm: zte: move CSC register definitions into a common header



The CSC (Color Space Conversion) block in VOU is used by not only
Graphic Layer (plane) but also channel (CRTC) module.  Let's move
its register definitions into a common header, so that CRTC driver can
include it when needed.

Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Reviewed-by: default avatarSean Paul <seanpaul@chromium.org>
Acked-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1491490870-6330-3-git-send-email-shawnguo@kernel.org
parent 893898f5
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+31 −0
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/*
 * Copyright (C) 2017 Sanechips Technology Co., Ltd.
 * Copyright 2017 Linaro Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef __ZX_COMMON_REGS_H__
#define __ZX_COMMON_REGS_H__

/* CSC registers */
#define CSC_CTRL0			0x30
#define CSC_COV_MODE_SHIFT		16
#define CSC_COV_MODE_MASK		(0xffff << CSC_COV_MODE_SHIFT)
#define CSC_BT601_IMAGE_RGB2YCBCR	0
#define CSC_BT601_IMAGE_YCBCR2RGB	1
#define CSC_BT601_VIDEO_RGB2YCBCR	2
#define CSC_BT601_VIDEO_YCBCR2RGB	3
#define CSC_BT709_IMAGE_RGB2YCBCR	4
#define CSC_BT709_IMAGE_YCBCR2RGB	5
#define CSC_BT709_VIDEO_RGB2YCBCR	6
#define CSC_BT709_VIDEO_YCBCR2RGB	7
#define CSC_BT2020_IMAGE_RGB2YCBCR	8
#define CSC_BT2020_IMAGE_YCBCR2RGB	9
#define CSC_BT2020_VIDEO_RGB2YCBCR	10
#define CSC_BT2020_VIDEO_YCBCR2RGB	11
#define CSC_WORK_ENABLE			BIT(0)

#endif /* __ZX_COMMON_REGS_H__ */
+1 −0
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@@ -16,6 +16,7 @@
#include <drm/drm_plane_helper.h>
#include <drm/drmP.h>

#include "zx_common_regs.h"
#include "zx_drm_drv.h"
#include "zx_plane.h"
#include "zx_plane_regs.h"
+0 −18
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@@ -77,24 +77,6 @@
#define LUMA_STRIDE(x)	 (((x) << LUMA_STRIDE_SHIFT) & LUMA_STRIDE_MASK)
#define CHROMA_STRIDE(x) (((x) << CHROMA_STRIDE_SHIFT) & CHROMA_STRIDE_MASK)

/* CSC registers */
#define CSC_CTRL0			0x30
#define CSC_COV_MODE_SHIFT		16
#define CSC_COV_MODE_MASK		(0xffff << CSC_COV_MODE_SHIFT)
#define CSC_BT601_IMAGE_RGB2YCBCR	0
#define CSC_BT601_IMAGE_YCBCR2RGB	1
#define CSC_BT601_VIDEO_RGB2YCBCR	2
#define CSC_BT601_VIDEO_YCBCR2RGB	3
#define CSC_BT709_IMAGE_RGB2YCBCR	4
#define CSC_BT709_IMAGE_YCBCR2RGB	5
#define CSC_BT709_VIDEO_RGB2YCBCR	6
#define CSC_BT709_VIDEO_YCBCR2RGB	7
#define CSC_BT2020_IMAGE_RGB2YCBCR	8
#define CSC_BT2020_IMAGE_YCBCR2RGB	9
#define CSC_BT2020_VIDEO_RGB2YCBCR	10
#define CSC_BT2020_VIDEO_YCBCR2RGB	11
#define CSC_WORK_ENABLE			BIT(0)

/* RSZ registers */
#define RSZ_SRC_CFG			0x00
#define RSZ_DEST_CFG			0x04