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Commit 9e176430 authored by Chris Wilson's avatar Chris Wilson Committed by Jani Nikula
Browse files

drm/i915: Align "unfenced" tiled access on gen2, early gen3 



Old devices have quite severe restrictions for using fences, and unlike
more recent device (anything from Pineview onwards) we need to enforce
those restrictions even for unfenced tiled access from the render
pipeline.

Fixes: 944397f0 ("drm/i915: Store required fence size/alignment for GGTT vma")
Reported-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.11-rc1+
Link: http://patchwork.freedesktop.org/patch/msgid/20170325113243.16438-1-chris@chris-wilson.co.uk


Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Tested-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
(cherry picked from commit f4ce766f)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 0abfe7e2

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -806,6 +806,7 @@ struct intel_csr { 
	func(has_resource_streamer); \

	func(has_runtime_pm); \

	func(has_snoop); \

	func(unfenced_needs_alignment); \

	func(cursor_needs_physical); \

	func(hws_needs_physical); \

	func(overlay_needs_physical); \

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+3 −1
Original line number Diff line number Diff line
@@ -888,6 +888,7 @@ i915_gem_execbuffer_reserve(struct intel_engine_cs *engine, 
	struct list_head ordered_vmas;

	struct list_head pinned_vmas;

	bool has_fenced_gpu_access = INTEL_GEN(engine->i915) < 4;

	bool needs_unfenced_map = INTEL_INFO(engine->i915)->unfenced_needs_alignment;

	int retry;



	vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
@@ -908,7 +909,8 @@ i915_gem_execbuffer_reserve(struct intel_engine_cs *engine, 
		if (!has_fenced_gpu_access)

			entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE;

		need_fence =

			entry->flags & EXEC_OBJECT_NEEDS_FENCE &&

			(entry->flags & EXEC_OBJECT_NEEDS_FENCE ||

			 needs_unfenced_map) &&

			i915_gem_object_is_tiled(obj);

		need_mappable = need_fence || need_reloc_mappable(vma);

drivers/gpu/drm/i915/i915_pci.c

+5 −0
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ 
	.has_overlay = 1, .overlay_needs_physical = 1, \

	.has_gmch_display = 1, \

	.hws_needs_physical = 1, \

	.unfenced_needs_alignment = 1, \

	.ring_mask = RENDER_RING, \

	GEN_DEFAULT_PIPEOFFSETS, \

	CURSOR_OFFSETS
@@ -101,6 +102,7 @@ static const struct intel_device_info intel_i915g_info = { 
	.platform = INTEL_I915G, .cursor_needs_physical = 1,

	.has_overlay = 1, .overlay_needs_physical = 1,

	.hws_needs_physical = 1,

	.unfenced_needs_alignment = 1,

};



static const struct intel_device_info intel_i915gm_info = {
@@ -112,6 +114,7 @@ static const struct intel_device_info intel_i915gm_info = { 
	.supports_tv = 1,

	.has_fbc = 1,

	.hws_needs_physical = 1,

	.unfenced_needs_alignment = 1,

};



static const struct intel_device_info intel_i945g_info = {
@@ -120,6 +123,7 @@ static const struct intel_device_info intel_i945g_info = { 
	.has_hotplug = 1, .cursor_needs_physical = 1,

	.has_overlay = 1, .overlay_needs_physical = 1,

	.hws_needs_physical = 1,

	.unfenced_needs_alignment = 1,

};



static const struct intel_device_info intel_i945gm_info = {
@@ -130,6 +134,7 @@ static const struct intel_device_info intel_i945gm_info = { 
	.supports_tv = 1,

	.has_fbc = 1,

	.hws_needs_physical = 1,

	.unfenced_needs_alignment = 1,

};



static const struct intel_device_info intel_g33_info = {