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Commit 9cc2a0c9 authored by Padmavathi Venna's avatar Padmavathi Venna Committed by Sylwester Nawrocki
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clk: samsung: exynos7: add gate clock for DMA block 



Add support for PDMA0 and PDMA1 gate clks.

Signed-off-by: default avatarPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
parent 83f191a7
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