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Commit 9c5c92e3 authored by Will Deacon's avatar Will Deacon
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iommu/arm-smmu: prefer stage-1 mappings where we have a choice 



For an SMMU that supports both Stage-1 and Stage-2 mappings (but not
nested translation), then we should prefer stage-1 mappings as we
otherwise rely on the memory attributes of the incoming transactions
for IOMMU_CACHE mappings.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 44680eed

drivers/iommu/arm-smmu.c

+4 −4
Original line number Diff line number Diff line
@@ -876,12 +876,12 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, 
		 */

		cfg->cbar = CBAR_TYPE_S1_TRANS_S2_BYPASS;

		start = smmu->num_s2_context_banks;

	} else if (smmu->features & ARM_SMMU_FEAT_TRANS_S2) {

		cfg->cbar = CBAR_TYPE_S2_TRANS;

		start = 0;

	} else {

	} else if (smmu->features & ARM_SMMU_FEAT_TRANS_S1) {

		cfg->cbar = CBAR_TYPE_S1_TRANS_S2_BYPASS;

		start = smmu->num_s2_context_banks;

	} else {

		cfg->cbar = CBAR_TYPE_S2_TRANS;

		start = 0;

	}



	ret = __arm_smmu_alloc_bitmap(smmu->context_map, start,