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Commit 9bafc741 authored by Russell King's avatar Russell King
Browse files

Merge branch 'devel-stable' into devel

parents 8df65168 b3773301

arch/arm/Kconfig

+12 −0
Original line number Diff line number Diff line
@@ -727,9 +727,11 @@ config ARCH_S5PC100 
config ARCH_S5PV210

	bool "Samsung S5PV210/S5PC110"

	select CPU_V7

	select ARCH_SPARSEMEM_ENABLE

	select GENERIC_GPIO

	select HAVE_CLK

	select ARM_L1_CACHE_SHIFT_6

	select ARCH_HAS_CPUFREQ

	select ARCH_USES_GETTIMEOFFSET

	select HAVE_S3C2410_I2C

	select HAVE_S3C_RTC
@@ -740,9 +742,13 @@ config ARCH_S5PV210 
config ARCH_S5PV310

	bool "Samsung S5PV310/S5PC210"

	select CPU_V7

	select ARCH_SPARSEMEM_ENABLE

	select GENERIC_GPIO

	select HAVE_CLK

	select GENERIC_CLOCKEVENTS

	select HAVE_S3C_RTC

	select HAVE_S3C2410_I2C

	select HAVE_S3C2410_WATCHDOG

	help

	  Samsung S5PV310 series based systems
@@ -1669,6 +1675,12 @@ if ARCH_HAS_CPUFREQ 


source "drivers/cpufreq/Kconfig"



config CPU_FREQ_IMX

	tristate "CPUfreq driver for i.MX CPUs"

	depends on ARCH_MXC && CPU_FREQ

	help

	  This enables the CPUfreq driver for i.MX CPUs.



config CPU_FREQ_SA1100

	bool

arch/arm/configs/mx51_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ CONFIG_FEC=y 
CONFIG_INPUT_FF_MEMLESS=m

# CONFIG_INPUT_MOUSEDEV_PSAUX is not set

CONFIG_INPUT_EVDEV=y

CONFIG_KEYBOARD_GPIO=y

CONFIG_INPUT_EVBUG=m

CONFIG_MOUSE_PS2=m

CONFIG_MOUSE_PS2_ELANTECH=y

arch/arm/include/asm/hardware/cache-l2x0.h

+10 −3
Original line number Diff line number Diff line
@@ -21,9 +21,6 @@ 
#define __ASM_ARM_HARDWARE_L2X0_H



#define L2X0_CACHE_ID			0x000

#define   L2X0_CACHE_ID_PART_MASK	(0xf << 6)

#define   L2X0_CACHE_ID_PART_L210	(1 << 6)

#define   L2X0_CACHE_ID_PART_L310	(3 << 6)

#define L2X0_CACHE_TYPE			0x004

#define L2X0_CTRL			0x100

#define L2X0_AUX_CTRL			0x104
@@ -53,6 +50,16 @@ 
#define L2X0_LINE_DATA			0xF10

#define L2X0_LINE_TAG			0xF30

#define L2X0_DEBUG_CTRL			0xF40

#define L2X0_PREFETCH_CTRL		0xF60

#define L2X0_POWER_CTRL			0xF80

#define   L2X0_DYNAMIC_CLK_GATING_EN	(1 << 1)

#define   L2X0_STNDBY_MODE_EN		(1 << 0)



/* Registers shifts and masks */

#define L2X0_CACHE_ID_PART_MASK		(0xf << 6)

#define L2X0_CACHE_ID_PART_L210		(1 << 6)

#define L2X0_CACHE_ID_PART_L310		(3 << 6)

#define L2X0_AUX_CTRL_WAY_SIZE_MASK	(0x3 << 17)



#ifndef __ASSEMBLY__

extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);

arch/arm/include/asm/outercache.h

+24 −0
Original line number Diff line number Diff line
@@ -25,6 +25,9 @@ struct outer_cache_fns { 
	void (*inv_range)(unsigned long, unsigned long);

	void (*clean_range)(unsigned long, unsigned long);

	void (*flush_range)(unsigned long, unsigned long);

	void (*flush_all)(void);

	void (*inv_all)(void);

	void (*disable)(void);

#ifdef CONFIG_OUTER_CACHE_SYNC

	void (*sync)(void);

#endif
@@ -50,6 +53,24 @@ static inline void outer_flush_range(unsigned long start, unsigned long end) 
		outer_cache.flush_range(start, end);

}



static inline void outer_flush_all(void)

{

	if (outer_cache.flush_all)

		outer_cache.flush_all();

}



static inline void outer_inv_all(void)

{

	if (outer_cache.inv_all)

		outer_cache.inv_all();

}



static inline void outer_disable(void)

{

	if (outer_cache.disable)

		outer_cache.disable();

}



#else



static inline void outer_inv_range(unsigned long start, unsigned long end)
@@ -58,6 +79,9 @@ static inline void outer_clean_range(unsigned long start, unsigned long end) 
{ }

static inline void outer_flush_range(unsigned long start, unsigned long end)

{ }

static inline void outer_flush_all(void) { }

static inline void outer_inv_all(void) { }

static inline void outer_disable(void) { }



#endif

arch/arm/kernel/machine_kexec.c

+3 −0
Original line number Diff line number Diff line
@@ -78,7 +78,10 @@ void machine_kexec(struct kimage *image) 
	local_fiq_disable();

	setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/

	flush_cache_all();

	outer_flush_all();

	outer_disable();

	cpu_proc_fin();

	outer_inv_all();

	flush_cache_all();

	cpu_reset(reboot_code_buffer_phys);

}