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Commit 9bacbced authored by Thomas Richter's avatar Thomas Richter Committed by Arnaldo Carvalho de Melo
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perf list: Add s390 support for detailed PMU event description



Correct the support of detailed/verbose PMU event description by using
the "Unit": keyword in the json files to address event names refering to
the /sys/devices/cpum_[cs]f devices.

Signed-off-by: default avatarThomas Richter <tmricht@linux.ibm.com>
Reviewed-by: default avatarHendrik Brueckner <brueckner@linux.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Link: http://lkml.kernel.org/r/20180621080452.61012-2-tmricht@linux.ibm.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent b8b5ab52
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[
	{
		"Unit": "CPU-M-CF",
		"EventCode": "0",
		"EventName": "CPU_CYCLES",
		"BriefDescription": "CPU Cycles",
		"PublicDescription": "Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "1",
		"EventName": "INSTRUCTIONS",
		"BriefDescription": "Instructions",
		"PublicDescription": "Instruction Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "2",
		"EventName": "L1I_DIR_WRITES",
		"BriefDescription": "L1I Directory Writes",
		"PublicDescription": "Level-1 I-Cache Directory Write Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "3",
		"EventName": "L1I_PENALTY_CYCLES",
		"BriefDescription": "L1I Penalty Cycles",
		"PublicDescription": "Level-1 I-Cache Penalty Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "4",
		"EventName": "L1D_DIR_WRITES",
		"BriefDescription": "L1D Directory Writes",
		"PublicDescription": "Level-1 D-Cache Directory Write Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "5",
		"EventName": "L1D_PENALTY_CYCLES",
		"BriefDescription": "L1D Penalty Cycles",
		"PublicDescription": "Level-1 D-Cache Penalty Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "32",
		"EventName": "PROBLEM_STATE_CPU_CYCLES",
		"BriefDescription": "Problem-State CPU Cycles",
		"PublicDescription": "Problem-State Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "33",
		"EventName": "PROBLEM_STATE_INSTRUCTIONS",
		"BriefDescription": "Problem-State Instructions",
		"PublicDescription": "Problem-State Instruction Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "34",
		"EventName": "PROBLEM_STATE_L1I_DIR_WRITES",
		"BriefDescription": "Problem-State L1I Directory Writes",
		"PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "35",
		"EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES",
		"BriefDescription": "Problem-State L1I Penalty Cycles",
		"PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "36",
		"EventName": "PROBLEM_STATE_L1D_DIR_WRITES",
		"BriefDescription": "Problem-State L1D Directory Writes",
		"PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "37",
		"EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES",
		"BriefDescription": "Problem-State L1D Penalty Cycles",
+16 −0
Original line number Diff line number Diff line
[
	{
		"Unit": "CPU-M-CF",
		"EventCode": "64",
		"EventName": "PRNG_FUNCTIONS",
		"BriefDescription": "PRNG Functions",
		"PublicDescription": "Total number of the PRNG functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "65",
		"EventName": "PRNG_CYCLES",
		"BriefDescription": "PRNG Cycles",
		"PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "66",
		"EventName": "PRNG_BLOCKED_FUNCTIONS",
		"BriefDescription": "PRNG Blocked Functions",
		"PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "67",
		"EventName": "PRNG_BLOCKED_CYCLES",
		"BriefDescription": "PRNG Blocked Cycles",
		"PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "68",
		"EventName": "SHA_FUNCTIONS",
		"BriefDescription": "SHA Functions",
		"PublicDescription": "Total number of SHA functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "69",
		"EventName": "SHA_CYCLES",
		"BriefDescription": "SHA Cycles",
		"PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "70",
		"EventName": "SHA_BLOCKED_FUNCTIONS",
		"BriefDescription": "SHA Blocked Functions",
		"PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "71",
		"EventName": "SHA_BLOCKED_CYCLES",
		"BriefDescription": "SHA Bloced Cycles",
		"PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "72",
		"EventName": "DEA_FUNCTIONS",
		"BriefDescription": "DEA Functions",
		"PublicDescription": "Total number of the DEA functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "73",
		"EventName": "DEA_CYCLES",
		"BriefDescription": "DEA Cycles",
		"PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "74",
		"EventName": "DEA_BLOCKED_FUNCTIONS",
		"BriefDescription": "DEA Blocked Functions",
		"PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "75",
		"EventName": "DEA_BLOCKED_CYCLES",
		"BriefDescription": "DEA Blocked Cycles",
		"PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "76",
		"EventName": "AES_FUNCTIONS",
		"BriefDescription": "AES Functions",
		"PublicDescription": "Total number of AES functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "77",
		"EventName": "AES_CYCLES",
		"BriefDescription": "AES Cycles",
		"PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "78",
		"EventName": "AES_BLOCKED_FUNCTIONS",
		"BriefDescription": "AES Blocked Functions",
		"PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "79",
		"EventName": "AES_BLOCKED_CYCLES",
		"BriefDescription": "AES Blocked Cycles",
+18 −0
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[
	{
		"Unit": "CPU-M-CF",
		"EventCode": "128",
		"EventName": "L1I_L2_SOURCED_WRITES",
		"BriefDescription": "L1I L2 Sourced Writes",
		"PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from the Level-2 (L1.5) cache"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "129",
		"EventName": "L1D_L2_SOURCED_WRITES",
		"BriefDescription": "L1D L2 Sourced Writes",
		"PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from the Level-2 (L1.5) cache"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "130",
		"EventName": "L1I_L3_LOCAL_WRITES",
		"BriefDescription": "L1I L3 Local Writes",
		"PublicDescription": "A directory write to the Level-1 I-Cache directory where the installed cache line was sourced from the Level-3 cache that is on the same book as the Instruction cache (Local L2 cache)"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "131",
		"EventName": "L1D_L3_LOCAL_WRITES",
		"BriefDescription": "L1D L3 Local Writes",
		"PublicDescription": "A directory write to the Level-1 D-Cache directory where the installtion cache line was source from the Level-3 cache that is on the same book as the Data cache (Local L2 cache)"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "132",
		"EventName": "L1I_L3_REMOTE_WRITES",
		"BriefDescription": "L1I L3 Remote Writes",
		"PublicDescription": "A directory write to the Level-1 I-Cache directory where the installed cache line was sourced from a Level-3 cache that is not on the same book as the Instruction cache (Remote L2 cache)"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "133",
		"EventName": "L1D_L3_REMOTE_WRITES",
		"BriefDescription": "L1D L3 Remote Writes",
		"PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from a Level-3 cache that is not on the same book as the Data cache (Remote L2 cache)"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "134",
		"EventName": "L1D_LMEM_SOURCED_WRITES",
		"BriefDescription": "L1D Local Memory Sourced Writes",
		"PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from memory that is attached to the same book as the Data cache (Local Memory)"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "135",
		"EventName": "L1I_LMEM_SOURCED_WRITES",
		"BriefDescription": "L1I Local Memory Sourced Writes",
		"PublicDescription": "A directory write to the Level-1 I-Cache where the installed cache line was sourced from memory that is attached to the s ame book as the Instruction cache (Local Memory)"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "136",
		"EventName": "L1D_RO_EXCL_WRITES",
		"BriefDescription": "L1D Read-only Exclusive Writes",
		"PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "137",
		"EventName": "L1I_CACHELINE_INVALIDATES",
		"BriefDescription": "L1I Cacheline Invalidates",
		"PublicDescription": "A cache line in the Level-1 I-Cache has been invalidated by a store on the same CPU as the Level-1 I-Cache"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "138",
		"EventName": "ITLB1_WRITES",
		"BriefDescription": "ITLB1 Writes",
		"PublicDescription": "A translation entry has been written into the Level-1 Instruction Translation Lookaside Buffer"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "139",
		"EventName": "DTLB1_WRITES",
		"BriefDescription": "DTLB1 Writes",
		"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "140",
		"EventName": "TLB2_PTE_WRITES",
		"BriefDescription": "TLB2 PTE Writes",
		"PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "141",
		"EventName": "TLB2_CRSTE_WRITES",
		"BriefDescription": "TLB2 CRSTE Writes",
		"PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "142",
		"EventName": "TLB2_CRSTE_HPAGE_WRITES",
		"BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes",
		"PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays for a one-megabyte large page translation"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "145",
		"EventName": "ITLB1_MISSES",
		"BriefDescription": "ITLB1 Misses",
		"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle an ITLB1 miss is in progress"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "146",
		"EventName": "DTLB1_MISSES",
		"BriefDescription": "DTLB1 Misses",
		"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle an DTLB1 miss is in progress"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "147",
		"EventName": "L2C_STORES_SENT",
		"BriefDescription": "L2C Stores Sent",
+12 −0
Original line number Diff line number Diff line
[
	{
		"Unit": "CPU-M-CF",
		"EventCode": "0",
		"EventName": "CPU_CYCLES",
		"BriefDescription": "CPU Cycles",
		"PublicDescription": "Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "1",
		"EventName": "INSTRUCTIONS",
		"BriefDescription": "Instructions",
		"PublicDescription": "Instruction Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "2",
		"EventName": "L1I_DIR_WRITES",
		"BriefDescription": "L1I Directory Writes",
		"PublicDescription": "Level-1 I-Cache Directory Write Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "3",
		"EventName": "L1I_PENALTY_CYCLES",
		"BriefDescription": "L1I Penalty Cycles",
		"PublicDescription": "Level-1 I-Cache Penalty Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "4",
		"EventName": "L1D_DIR_WRITES",
		"BriefDescription": "L1D Directory Writes",
		"PublicDescription": "Level-1 D-Cache Directory Write Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "5",
		"EventName": "L1D_PENALTY_CYCLES",
		"BriefDescription": "L1D Penalty Cycles",
		"PublicDescription": "Level-1 D-Cache Penalty Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "32",
		"EventName": "PROBLEM_STATE_CPU_CYCLES",
		"BriefDescription": "Problem-State CPU Cycles",
		"PublicDescription": "Problem-State Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "33",
		"EventName": "PROBLEM_STATE_INSTRUCTIONS",
		"BriefDescription": "Problem-State Instructions",
		"PublicDescription": "Problem-State Instruction Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "34",
		"EventName": "PROBLEM_STATE_L1I_DIR_WRITES",
		"BriefDescription": "Problem-State L1I Directory Writes",
		"PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "35",
		"EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES",
		"BriefDescription": "Problem-State L1I Penalty Cycles",
		"PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "36",
		"EventName": "PROBLEM_STATE_L1D_DIR_WRITES",
		"BriefDescription": "Problem-State L1D Directory Writes",
		"PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "37",
		"EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES",
		"BriefDescription": "Problem-State L1D Penalty Cycles",
+16 −0
Original line number Diff line number Diff line
[
	{
		"Unit": "CPU-M-CF",
		"EventCode": "64",
		"EventName": "PRNG_FUNCTIONS",
		"BriefDescription": "PRNG Functions",
		"PublicDescription": "Total number of the PRNG functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "65",
		"EventName": "PRNG_CYCLES",
		"BriefDescription": "PRNG Cycles",
		"PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "66",
		"EventName": "PRNG_BLOCKED_FUNCTIONS",
		"BriefDescription": "PRNG Blocked Functions",
		"PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "67",
		"EventName": "PRNG_BLOCKED_CYCLES",
		"BriefDescription": "PRNG Blocked Cycles",
		"PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "68",
		"EventName": "SHA_FUNCTIONS",
		"BriefDescription": "SHA Functions",
		"PublicDescription": "Total number of SHA functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "69",
		"EventName": "SHA_CYCLES",
		"BriefDescription": "SHA Cycles",
		"PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "70",
		"EventName": "SHA_BLOCKED_FUNCTIONS",
		"BriefDescription": "SHA Blocked Functions",
		"PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "71",
		"EventName": "SHA_BLOCKED_CYCLES",
		"BriefDescription": "SHA Bloced Cycles",
		"PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "72",
		"EventName": "DEA_FUNCTIONS",
		"BriefDescription": "DEA Functions",
		"PublicDescription": "Total number of the DEA functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "73",
		"EventName": "DEA_CYCLES",
		"BriefDescription": "DEA Cycles",
		"PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "74",
		"EventName": "DEA_BLOCKED_FUNCTIONS",
		"BriefDescription": "DEA Blocked Functions",
		"PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "75",
		"EventName": "DEA_BLOCKED_CYCLES",
		"BriefDescription": "DEA Blocked Cycles",
		"PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "76",
		"EventName": "AES_FUNCTIONS",
		"BriefDescription": "AES Functions",
		"PublicDescription": "Total number of AES functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "77",
		"EventName": "AES_CYCLES",
		"BriefDescription": "AES Cycles",
		"PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "78",
		"EventName": "AES_BLOCKED_FUNCTIONS",
		"BriefDescription": "AES Blocked Functions",
		"PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
	},
	{
		"Unit": "CPU-M-CF",
		"EventCode": "79",
		"EventName": "AES_BLOCKED_CYCLES",
		"BriefDescription": "AES Blocked Cycles",
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