Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9ba7648c authored by Vineet Gupta's avatar Vineet Gupta
Browse files

ARC: [dts] Rename cpu_intc -> core_intc 



This is again for future changes to use common DTSI for timers which
refer to @core_intc

Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 2e8cd938

arch/arc/boot/dts/axc001.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 


		ranges = <0x00000000 0xf0000000 0x10000000>;



		cpu_intc: arc700-intc@cpu {

		core_intc: arc700-intc@cpu {

			compatible = "snps,arc700-intc";

			interrupt-controller;

			#interrupt-cells = <1>;
@@ -50,7 +50,7 @@ 
				reg = <0>;

				interrupt-controller;

				#interrupt-cells = <2>;

				interrupt-parent = <&cpu_intc>;

				interrupt-parent = <&core_intc>;

				interrupts = <15>;

			};

		};
@@ -88,7 +88,7 @@ 
		compatible = "snps,dw-apb-ictl";

		reg = < 0xe0012000 0x200 >;

		interrupt-controller;

		interrupt-parent = <&cpu_intc>;

		interrupt-parent = <&core_intc>;

		interrupts = < 7 >;

	};

arch/arc/boot/dts/axc003.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 


		ranges = <0x00000000 0xf0000000 0x10000000>;



		cpu_intc: archs-intc@cpu {

		core_intc: archs-intc@cpu {

			compatible = "snps,archs-intc";

			interrupt-controller;

			#interrupt-cells = <1>;
@@ -49,7 +49,7 @@ 
				reg = <0>;

				interrupt-controller;

				#interrupt-cells = <2>;

				interrupt-parent = <&cpu_intc>;

				interrupt-parent = <&core_intc>;

				interrupts = <25>;

			};

		};
@@ -68,7 +68,7 @@ 
		arcpct0: pct {

			compatible = "snps,archs-pct";

			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;

			interrupt-parent = <&core_intc>;

			interrupts = <20>;

		};

	};
@@ -91,7 +91,7 @@ 
		compatible = "snps,dw-apb-ictl";

		reg = < 0xe0012000 0x200 >;

		interrupt-controller;

		interrupt-parent = <&cpu_intc>;

		interrupt-parent = <&core_intc>;

		interrupts = < 24 >;

	};

arch/arc/boot/dts/axc003_idu.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 


		ranges = <0x00000000 0xf0000000 0x10000000>;



		cpu_intc: archs-intc@cpu {

		core_intc: archs-intc@cpu {

			compatible = "snps,archs-intc";

			interrupt-controller;

			#interrupt-cells = <1>;
@@ -34,7 +34,7 @@ 
		idu_intc: idu-interrupt-controller {

			compatible = "snps,archs-idu-intc";

			interrupt-controller;

			interrupt-parent = <&cpu_intc>;

			interrupt-parent = <&core_intc>;



			/*

			 * <hwirq  distribution>
@@ -91,7 +91,7 @@ 
		arcpct0: pct {

			compatible = "snps,archs-pct";

			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;

			interrupt-parent = <&core_intc>;

			interrupts = <20>;

		};

	};

arch/arc/boot/dts/nsim_700.dts

+2 −2
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 
	clock-frequency = <80000000>;	/* 80 MHZ */

	#address-cells = <1>;

	#size-cells = <1>;

	interrupt-parent = <&intc>;

	interrupt-parent = <&core_intc>;



	chosen {

		bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";
@@ -32,7 +32,7 @@ 
		/* child and parent address space 1:1 mapped */

		ranges;



		intc: interrupt-controller {

		core_intc: interrupt-controller {

			compatible = "snps,arc700-intc";

			interrupt-controller;

			#interrupt-cells = <1>;

arch/arc/boot/dts/nsimosci.dts

+2 −2
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 
	clock-frequency = <20000000>;	/* 20 MHZ */

	#address-cells = <1>;

	#size-cells = <1>;

	interrupt-parent = <&intc>;

	interrupt-parent = <&core_intc>;



	chosen {

		/* this is for console on PGU */
@@ -35,7 +35,7 @@ 
		/* child and parent address space 1:1 mapped */

		ranges;



		intc: interrupt-controller {

		core_intc: interrupt-controller {

			compatible = "snps,arc700-intc";

			interrupt-controller;

			#interrupt-cells = <1>;