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Commit 9b954357 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add dcc registers for lito"

parents 4528d901 69bb016a

qcom/lito.dtsi

+524 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/msm/msm-bus-ids.h>

#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>

#include <dt-bindings/soc/qcom,dcc_v2.h>

#include <dt-bindings/soc/qcom,ipcc.h>

#include <dt-bindings/soc/qcom,rpmh-rsc.h>

#include <dt-bindings/spmi/spmi.h>
@@ -829,6 +830,529 @@ 
		reg-names = "dcc-base", "dcc-ram-base";



		dcc-ram-offset = <0xb000>;



		qcom,curr-link-list = <6>;

		qcom,data-sink = "sram";

		qcom,link-list = <DCC_READ 0x18000024 1 0>,

				<DCC_READ 0x18000040 1 0>,

				<DCC_READ 0x18010024 1 0>,

				<DCC_READ 0x18010040 1 0>,

				<DCC_READ 0x18020024 1 0>,

				<DCC_READ 0x18020040 1 0>,

				<DCC_READ 0x18030024 1 0>,

				<DCC_READ 0x18030040 1 0>,

				<DCC_READ 0x18040024 1 0>,

				<DCC_READ 0x18040040 1 0>,

				<DCC_READ 0x18050024 1 0>,

				<DCC_READ 0x18050040 1 0>,

				<DCC_READ 0x18060024 1 0>,

				<DCC_READ 0x18060040 1 0>,

				<DCC_READ 0x18070024 1 0>,

				<DCC_READ 0x18070040 1 0>,

				<DCC_READ 0x18080024 1 0>,

				<DCC_READ 0x18080040 1 0>,

				<DCC_READ 0x18080044 1 0>,

				<DCC_READ 0x18080048 1 0>,

				<DCC_READ 0x1808004c 1 0>,

				<DCC_READ 0x18080054 1 0>,

				<DCC_READ 0x1808006c 1 0>,

				<DCC_READ 0x18080070 1 0>,

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				<DCC_READ 0x18282000 1 0>,

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