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Commit 9b0cd304 authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux 

Pull drm updates from Dave Airlie:
 "Been a bit busy, first week of kids school, and waiting on other trees
  to go in before I could send this, so its a bit later than I'd
  normally like.

  Highlights:
   - core:
      timestamp fixes, lots of misc cleanups
   - new drivers:
      bochs virtual vga
   - vmwgfx:
      major overhaul for their nextgen virt gpu.
   - i915:
      runtime D3 on HSW, watermark fixes, power well work, fbc fixes,
      bdw is no longer prelim.
   - nouveau:
      gk110/208 acceleration, more pm groundwork, old overlay support
   - radeon:
      dpm rework and clockgating for CIK, pci config reset, big endian
      fixes
   - tegra:
      panel support and DSI support, build as module, prime.
   - armada, omap, gma500, rcar, exynos, mgag200, cirrus, ast:
      fixes
   - msm:
      hdmi support for mdp5"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (595 commits)
  drm/nouveau: resume display if any later suspend bits fail
  drm/nouveau: fix lock unbalance in nouveau_crtc_page_flip
  drm/nouveau: implement hooks for needed for drm vblank timestamping support
  drm/nouveau/disp: add a method to fetch info needed by drm vblank timestamping
  drm/nv50: fill in crtc mode struct members from crtc_mode_fixup
  drm/radeon/dce8: workaround for atom BlankCrtc table
  drm/radeon/DCE4+: clear bios scratch dpms bit (v2)
  drm/radeon: set si_notify_smc_display_change properly
  drm/radeon: fix DAC interrupt handling on DCE5+
  drm/radeon: clean up active vram sizing
  drm/radeon: skip async dma init on r6xx
  drm/radeon/runpm: don't runtime suspend non-PX cards
  drm/radeon: add ring to fence trace functions
  drm/radeon: add missing trace point
  drm/radeon: fix VMID use tracking
  drm: ast,cirrus,mgag200: use drm_can_sleep
  drm/gma500: Lock struct_mutex around cursor updates
  drm/i915: Fix the offset issue for the stolen GEM objects
  DRM: armada: fix missing DRM_KMS_FB_HELPER select
  drm/i915: Decouple GPU error reporting from ring initialisation
  ...
parents ca2a650f ef64cf9d

Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt

+17 −2
Original line number Diff line number Diff line
@@ -118,6 +118,9 @@ of the following host1x client modules: 
    See ../reset/reset.txt for details.

  - reset-names: Must include the following entries:

    - dc

  - nvidia,head: The number of the display controller head. This is used to

    setup the various types of output to receive video data from the given

    head.



  Each display controller node has a child node, named "rgb", that represents

  the RGB output associated with the controller. It can take the following
@@ -125,6 +128,7 @@ of the following host1x client modules: 
  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing

  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection

  - nvidia,edid: supplies a binary EDID blob

  - nvidia,panel: phandle of a display panel



- hdmi: High Definition Multimedia Interface
@@ -149,6 +153,7 @@ of the following host1x client modules: 
  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing

  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection

  - nvidia,edid: supplies a binary EDID blob

  - nvidia,panel: phandle of a display panel



- tvo: TV encoder output
@@ -169,11 +174,21 @@ of the following host1x client modules: 
  - clock-names: Must include the following entries:

    - dsi

      This MUST be the first entry.

    - lp

    - parent

  - resets: Must contain an entry for each entry in reset-names.

    See ../reset/reset.txt for details.

  - reset-names: Must include the following entries:

    - dsi

  - nvidia,mipi-calibrate: Should contain a phandle and a specifier specifying

    which pads are used by this DSI output and need to be calibrated. See also

    ../mipi/nvidia,tegra114-mipi.txt.



  Optional properties:

  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing

  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection

  - nvidia,edid: supplies a binary EDID blob

  - nvidia,panel: phandle of a display panel



Example:
@@ -253,7 +268,7 @@ Example: 
			interrupts = <0 73 0x04>;

			clocks = <&tegra_car TEGRA20_CLK_DISP1>,

				 <&tegra_car TEGRA20_CLK_PLL_P>;

			clock-names = "disp1", "parent";

			clock-names = "dc", "parent";

			resets = <&tegra_car 27>;

			reset-names = "dc";
@@ -268,7 +283,7 @@ Example: 
			interrupts = <0 74 0x04>;

			clocks = <&tegra_car TEGRA20_CLK_DISP2>,

				 <&tegra_car TEGRA20_CLK_PLL_P>;

			clock-names = "disp2", "parent";

			clock-names = "dc", "parent";

			resets = <&tegra_car 26>;

			reset-names = "dc";

Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt

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MIPI DSI (Display Serial Interface) busses

==========================================



The MIPI Display Serial Interface specifies a serial bus and a protocol for

communication between a host and up to four peripherals. This document will

define the syntax used to represent a DSI bus in a device tree.



This document describes DSI bus-specific properties only or defines existing

standard properties in the context of the DSI bus.



Each DSI host provides a DSI bus. The DSI host controller's node contains a

set of properties that characterize the bus. Child nodes describe individual

peripherals on that bus.



The following assumes that only a single peripheral is connected to a DSI

host. Experience shows that this is true for the large majority of setups.



DSI host

--------



In addition to the standard properties and those defined by the parent bus of

a DSI host, the following properties apply to a node representing a DSI host.



Required properties:

- #address-cells: The number of cells required to represent an address on the

  bus. DSI peripherals are addressed using a 2-bit virtual channel number, so

  a maximum of 4 devices can be addressed on a single bus. Hence the value of

  this property should be 1.

- #size-cells: Should be 0. There are cases where it makes sense to use a

  different value here. See below.



DSI peripheral

--------------



Peripherals are represented as child nodes of the DSI host's node. Properties

described here apply to all DSI peripherals, but individual bindings may want

to define additional, device-specific properties.



Required properties:

- reg: The virtual channel number of a DSI peripheral. Must be in the range

  from 0 to 3.



Some DSI peripherals respond to more than a single virtual channel. In that

case two alternative representations can be chosen:

- The reg property can take multiple entries, one for each virtual channel

  that the peripheral responds to.

- If the virtual channels that a peripheral responds to are consecutive, the

  #size-cells can be set to 1. The first cell of each entry in the reg

  property is the number of the first virtual channel and the second cell is

  the number of consecutive virtual channels.



Example

-------



	dsi-host {

		...



		#address-cells = <1>;

		#size-cells = <0>;



		/* peripheral responds to virtual channel 0 */

		peripheral@0 {

			compatible = "...";

			reg = <0>;

		};



		...

	};



	dsi-host {

		...



		#address-cells = <1>;

		#size-cells = <0>;



		/* peripheral responds to virtual channels 0 and 2 */

		peripheral@0 {

			compatible = "...";

			reg = <0, 2>;

		};



		...

	};



	dsi-host {

		...



		#address-cells = <1>;

		#size-cells = <1>;



		/* peripheral responds to virtual channels 1, 2 and 3 */

		peripheral@1 {

			compatible = "...";

			reg = <1 3>;

		};



		...

	};

Documentation/devicetree/bindings/mipi/nvidia,tegra114-mipi.txt

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NVIDIA Tegra MIPI pad calibration controller



Required properties:

- compatible: "nvidia,tegra<chip>-mipi"

- reg: Physical base address and length of the controller's registers.

- clocks: Must contain an entry for each entry in clock-names.

  See ../clocks/clock-bindings.txt for details.

- clock-names: Must include the following entries:

  - mipi-cal

- #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads

  that need to be calibrated for a given device.



User nodes need to contain an nvidia,mipi-calibrate property that has a

phandle to refer to the calibration controller node and a bitmask of the pads

that need to be calibrated.



Example:



	mipi: mipi@700e3000 {

		compatible = "nvidia,tegra114-mipi";

		reg = <0x700e3000 0x100>;

		clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;

		clock-names = "mipi-cal";

		#nvidia,mipi-calibrate-cells = <1>;

	};



	...



	host1x@50000000 {

		...



		dsi@54300000 {

			...



			nvidia,mipi-calibrate = <&mipi 0x060>;



			...

		};



		...

	};

Documentation/devicetree/bindings/panel/auo,b101aw03.txt

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+7 −0
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AU Optronics Corporation 10.1" WSVGA TFT LCD panel



Required properties:

- compatible: should be "auo,b101aw03"



This binding is compatible with the simple-panel binding, which is specified

in simple-panel.txt in this directory.

Documentation/devicetree/bindings/panel/chunghwa,claa101wa01a.txt

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+7 −0
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Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel



Required properties:

- compatible: should be "chunghwa,claa101wa01a"



This binding is compatible with the simple-panel binding, which is specified

in simple-panel.txt in this directory.