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Commit 9a9952bb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'iommu-updates-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu 

Pull iommu updates for from Joerg Roedel:
 "This time the IOMMU updates are mostly cleanups or fixes.  No big new
  features or drivers this time.  In particular the changes include:

   - Bigger cleanup of the Domain<->IOMMU data structures and the code
     that manages them in the Intel VT-d driver.  This makes the code
     easier to understand and maintain, and also easier to keep the data
     structures in sync.  It is also a preparation step to make use of
     default domains from the IOMMU core in the Intel VT-d driver.

   - Fixes for a couple of DMA-API misuses in ARM IOMMU drivers, namely
     in the ARM and Tegra SMMU drivers.

   - Fix for a potential buffer overflow in the OMAP iommu driver's
     debug code

   - A couple of smaller fixes and cleanups in various drivers

   - One small new feature: Report domain-id usage in the Intel VT-d
     driver to easier detect bugs where these are leaked"

* tag 'iommu-updates-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (83 commits)
  iommu/vt-d: Really use upper context table when necessary
  x86/vt-d: Fix documentation of DRHD
  iommu/fsl: Really fix init section(s) content
  iommu/io-pgtable-arm: Unmap and free table when overwriting with block
  iommu/io-pgtable-arm: Move init-fn declarations to io-pgtable.h
  iommu/msm: Use BUG_ON instead of if () BUG()
  iommu/vt-d: Access iomem correctly
  iommu/vt-d: Make two functions static
  iommu/vt-d: Use BUG_ON instead of if () BUG()
  iommu/vt-d: Return false instead of 0 in irq_remapping_cap()
  iommu/amd: Use BUG_ON instead of if () BUG()
  iommu/amd: Make a symbol static
  iommu/amd: Simplify allocation in irq_remapping_alloc()
  iommu/tegra-smmu: Parameterize number of TLB lines
  iommu/tegra-smmu: Factor out tegra_smmu_set_pde()
  iommu/tegra-smmu: Extract tegra_smmu_pte_get_use()
  iommu/tegra-smmu: Use __GFP_ZERO to allocate zeroed pages
  iommu/tegra-smmu: Remove PageReserved manipulation
  iommu/tegra-smmu: Convert to use DMA API
  iommu/tegra-smmu: smmu_flush_ptc() wants device addresses
  ...
parents e81b594c 4ad79562

Documentation/devicetree/bindings/iommu/arm,smmu.txt

+6 −0
Original line number Diff line number Diff line
@@ -43,6 +43,12 @@ conditions. 


** System MMU optional properties:



- dma-coherent  : Present if page table walks made by the SMMU are

                  cache coherent with the CPU.



                  NOTE: this only applies to the SMMU itself, not

                  masters connected upstream of the SMMU.



- calxeda,smmu-secure-config-access : Enable proper handling of buggy

                  implementations that always use secure access to

                  SMMU configuration registers. In this case non-secure

Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt

+6 −0
Original line number Diff line number Diff line
@@ -8,6 +8,11 @@ Required properties: 
- ti,hwmods  : Name of the hwmod associated with the IOMMU instance

- reg        : Address space for the configuration registers

- interrupts : Interrupt specifier for the IOMMU instance

- #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices,

                 and needs no additional data in the pargs specifier. Please

                 also refer to the generic bindings document for more info

                 on this property,

                     Documentation/devicetree/bindings/iommu/iommu.txt



Optional properties:

- ti,#tlb-entries : Number of entries in the translation look-aside buffer.
@@ -18,6 +23,7 @@ Optional properties: 
Example:

	/* OMAP3 ISP MMU */

	mmu_isp: mmu@480bd400 {

		#iommu-cells = <0>;

		compatible = "ti,omap2-iommu";

		reg = <0x480bd400 0x80>;

		interrupts = <24>;

drivers/iommu/Kconfig

+2 −1
Original line number Diff line number Diff line
@@ -23,7 +23,8 @@ config IOMMU_IO_PGTABLE 
config IOMMU_IO_PGTABLE_LPAE

	bool "ARMv7/v8 Long Descriptor Format"

	select IOMMU_IO_PGTABLE

	depends on ARM || ARM64 || COMPILE_TEST

	# SWIOTLB guarantees a dma_to_phys() implementation

	depends on ARM || ARM64 || (COMPILE_TEST && SWIOTLB)

	help

	  Enable support for the ARM long descriptor pagetable format.

	  This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page

drivers/iommu/amd_iommu.c

+8 −13
Original line number Diff line number Diff line
@@ -1835,8 +1835,8 @@ static void free_gcr3_table(struct protection_domain *domain) 
		free_gcr3_tbl_level2(domain->gcr3_tbl);

	else if (domain->glx == 1)

		free_gcr3_tbl_level1(domain->gcr3_tbl);

	else if (domain->glx != 0)

		BUG();

	else

		BUG_ON(domain->glx != 0);



	free_page((unsigned long)domain->gcr3_tbl);

}
@@ -3947,11 +3947,6 @@ static int irq_remapping_alloc(struct irq_domain *domain, unsigned int virq, 
	if (ret < 0)

		return ret;



	ret = -ENOMEM;

	data = kzalloc(sizeof(*data), GFP_KERNEL);

	if (!data)

		goto out_free_parent;



	if (info->type == X86_IRQ_ALLOC_TYPE_IOAPIC) {

		if (get_irq_table(devid, true))

			index = info->ioapic_pin;
@@ -3962,7 +3957,6 @@ static int irq_remapping_alloc(struct irq_domain *domain, unsigned int virq, 
	}

	if (index < 0) {

		pr_warn("Failed to allocate IRTE\n");

		kfree(data);

		goto out_free_parent;

	}
@@ -3974,17 +3968,18 @@ static int irq_remapping_alloc(struct irq_domain *domain, unsigned int virq, 
			goto out_free_data;

		}



		if (i > 0) {

		ret = -ENOMEM;

		data = kzalloc(sizeof(*data), GFP_KERNEL);

		if (!data)

			goto out_free_data;

		}



		irq_data->hwirq = (devid << 16) + i;

		irq_data->chip_data = data;

		irq_data->chip = &amd_ir_chip;

		irq_remapping_prepare_irte(data, cfg, info, devid, index, i);

		irq_set_status_flags(virq + i, IRQ_MOVE_PCNTXT);

	}



	return 0;



out_free_data:

drivers/iommu/amd_iommu_init.c

+1 −1
Original line number Diff line number Diff line
@@ -154,7 +154,7 @@ bool amd_iommu_iotlb_sup __read_mostly = true; 
u32 amd_iommu_max_pasid __read_mostly = ~0;



bool amd_iommu_v2_present __read_mostly;

bool amd_iommu_pc_present __read_mostly;

static bool amd_iommu_pc_present __read_mostly;



bool amd_iommu_force_isolation __read_mostly;