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Commit 9a67beb6 authored by Tony Truong's avatar Tony Truong
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dt-bindings: pcie: add bandwidth scale table 

Add devicetree entry for bandwidth scale table. Each PCIe Gen
speed have different CX and rate change frequency requirement.
Capture each setting in devicetree.

Change-Id: I70edb491e4ee1bb4ca307f81b0e29544e54d948e
parent c7f605a5

bindings/pci/pci-msm.txt

+9 −0
Original line number Diff line number Diff line
@@ -132,6 +132,12 @@ Main node 
	Definition: List of max/min voltage(uV) and optimal current(uA) tuple

		for power supply



- qcom,bw-scale:

	Usage: optional

	Value type: <prop-encoded-array>

	Definition: List of CX voltage corner and rate change clock frequency

		pair for each PCIe GEN speed



- qcom,msm-bus,<bus-field>:

	Usage: required

	Value type: <prop-encoded>
@@ -424,6 +430,9 @@ Example 
		qcom,vreg-0.9-voltage-level = <950000 950000 24000>;

		qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX

						RPMH_REGULATOR_LEVEL_NOM 0>;

		qcom,bw-scale = <RPMH_REGULATOR_LEVEL_LOW_SVS 19200000 /* Gen1 */

				<RPMH_REGULATOR_LEVEL_LOW_SVS 19200000 /* Gen2 */

				<RPMH_REGULATOR_LEVEL_NOM 100000000>; /* Gen3 */



		qcom,msm-bus,name = "pcie0";

		qcom,msm-bus,num-cases = <2>;