powerpc: 8xx: fix whitespace and indentation (99121c0d) · Commits · e / devices / android_kernel_fairphone_FP4

arch/powerpc/platforms/8xx/mpc885ads_setup.c

+58 −67

Original line number	Original line	Diff line number	Diff line
	@@ -188,7 +188,6 @@ void __init mpc885ads_board_setup(void)
	#endif		#endif
	}		}


	static void init_fec1_ioports(struct fs_platform_info *ptr)		static void init_fec1_ioports(struct fs_platform_info *ptr)
	{		{
	cpm8xx_t cp = (cpm8xx_t ) immr_map(im_cpm);		cpm8xx_t cp = (cpm8xx_t ) immr_map(im_cpm);
	@@ -214,7 +213,6 @@ static void init_fec1_ioports(struct fs_platform_info* ptr)
	immr_unmap(cp);		immr_unmap(cp);
	}		}


	static void init_fec2_ioports(struct fs_platform_info *ptr)		static void init_fec2_ioports(struct fs_platform_info *ptr)
	{		{
	cpm8xx_t cp = (cpm8xx_t ) immr_map(im_cpm);		cpm8xx_t cp = (cpm8xx_t ) immr_map(im_cpm);
	@@ -283,8 +281,7 @@ static void init_scc3_ioports(struct fs_platform_info* fpi)
	*/		*/
	setbits32(&cp->cp_pepar, PE_ENET_TCLK \| PE_ENET_RCLK);		setbits32(&cp->cp_pepar, PE_ENET_TCLK \| PE_ENET_RCLK);
	clrbits32(&cp->cp_pepar, PE_ENET_TENA);		clrbits32(&cp->cp_pepar, PE_ENET_TENA);
	clrbits32(&cp->cp_pedir,		clrbits32(&cp->cp_pedir, PE_ENET_TCLK \| PE_ENET_RCLK \| PE_ENET_TENA);
	PE_ENET_TCLK \| PE_ENET_RCLK \| PE_ENET_TENA);
	clrbits32(&cp->cp_peso, PE_ENET_TCLK \| PE_ENET_RCLK);		clrbits32(&cp->cp_peso, PE_ENET_TCLK \| PE_ENET_RCLK);
	setbits32(&cp->cp_peso, PE_ENET_TENA);		setbits32(&cp->cp_peso, PE_ENET_TENA);

	@@ -328,8 +325,6 @@ void init_scc_ioports(struct fs_platform_info *fpi)
	}		}
	}		}



	static void init_smc1_uart_ioports(struct fs_uart_platform_info *ptr)		static void init_smc1_uart_ioports(struct fs_uart_platform_info *ptr)
	{		{
	unsigned *bcsr_io;		unsigned *bcsr_io;
	@@ -444,15 +439,11 @@ static int __init mpc885ads_probe(void)
	return 1;		return 1;
	}		}

	define_machine(mpc885_ads) {		define_machine(mpc885_ads)
	.name = "MPC885 ADS",		{
	.probe = mpc885ads_probe,		.name = "MPC885 ADS",.probe = mpc885ads_probe,.setup_arch =
	.setup_arch = mpc885ads_setup_arch,		mpc885ads_setup_arch,.init_IRQ =
	.init_IRQ = m8xx_pic_init,		m8xx_pic_init,.show_cpuinfo = mpc8xx_show_cpuinfo,.get_irq =
	.show_cpuinfo = mpc8xx_show_cpuinfo,		mpc8xx_get_irq,.restart = mpc8xx_restart,.calibrate_decr =
	.get_irq = mpc8xx_get_irq,		mpc8xx_calibrate_decr,.set_rtc_time =
	.restart = mpc8xx_restart,		mpc8xx_set_rtc_time,.get_rtc_time = mpc8xx_get_rtc_time,};
	.calibrate_decr = mpc8xx_calibrate_decr,
	.set_rtc_time = mpc8xx_set_rtc_time,
	.get_rtc_time = mpc8xx_get_rtc_time,
	};

drivers/pcmcia/m8xx_pcmcia.c

+278 −270

Original line number	Original line	Diff line number	Diff line
	@@ -248,8 +248,7 @@ static struct socket_info socket[PCMCIA_SOCKETS_NO];

	#define M8XX_SIZES_NO 32		#define M8XX_SIZES_NO 32

	static const u32 m8xx_size_to_gray[M8XX_SIZES_NO] =		static const u32 m8xx_size_to_gray[M8XX_SIZES_NO] = {
	{
	0x00000001, 0x00000002, 0x00000008, 0x00000004,		0x00000001, 0x00000002, 0x00000008, 0x00000004,
	0x00000080, 0x00000040, 0x00000010, 0x00000020,		0x00000080, 0x00000040, 0x00000010, 0x00000020,
	0x00008000, 0x00004000, 0x00001000, 0x00002000,		0x00008000, 0x00004000, 0x00001000, 0x00002000,
	@@ -290,7 +289,8 @@ static int voltage_set(int slot, int vcc, int vpp)
	u32 reg = 0;		u32 reg = 0;

	switch (vcc) {		switch (vcc) {
	case 0: break;		case 0:
			break;
	case 33:		case 33:
	reg \|= BCSR1_PCVCTL4;		reg \|= BCSR1_PCVCTL4;
	break;		break;
	@@ -302,7 +302,8 @@ static int voltage_set(int slot, int vcc, int vpp)
	}		}

	switch (vpp) {		switch (vpp) {
	case 0: break;		case 0:
			break;
	case 33:		case 33:
	case 50:		case 50:
	if (vcc == vpp)		if (vcc == vpp)
	@@ -321,7 +322,11 @@ static int voltage_set(int slot, int vcc, int vpp)

	/* first, turn off all power */		/* first, turn off all power */

	out_be32(((u32 )RPX_CSR_ADDR), in_be32(((u32 )RPX_CSR_ADDR)) & ~(BCSR1_PCVCTL4 \| BCSR1_PCVCTL5 \| BCSR1_PCVCTL6 \| BCSR1_PCVCTL7));		out_be32(((u32 *) RPX_CSR_ADDR),
			in_be32(((u32 *) RPX_CSR_ADDR)) & ~(BCSR1_PCVCTL4 \|
			BCSR1_PCVCTL5 \|
			BCSR1_PCVCTL6 \|
			BCSR1_PCVCTL7));

	/* enable new powersettings */		/* enable new powersettings */

	@@ -379,7 +384,9 @@ static int voltage_set(int slot, int vcc, int vpp)
	}		}

	/* first, turn off all power */		/* first, turn off all power */
	out_be32((u32 )BCSR1, in_be32((u32 )BCSR1) & ~(BCSR1_PCCVCC_MASK \| BCSR1_PCCVPP_MASK));		out_be32((u32 *) BCSR1,
			in_be32((u32 *) BCSR1) & ~(BCSR1_PCCVCC_MASK \|
			BCSR1_PCCVPP_MASK));

	/* enable new powersettings */		/* enable new powersettings */
	out_be32((u32 ) BCSR1, in_be32((u32 ) BCSR1) \| reg);		out_be32((u32 ) BCSR1, in_be32((u32 ) BCSR1) \| reg);
	@@ -469,7 +476,8 @@ static int voltage_set(int slot, int vcc, int vpp)
	}		}

	/* first, turn off all power */		/* first, turn off all power */
	out_8((u8 )MBX_CSR2_ADDR, in_8((u8 )MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK \| CSR2_VPP_MASK));		out_8((u8 *) MBX_CSR2_ADDR,
			in_8((u8 *) MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK \| CSR2_VPP_MASK));

	/* enable new powersettings */		/* enable new powersettings */
	out_8((u8 ) MBX_CSR2_ADDR, in_8((u8 ) MBX_CSR2_ADDR) \| reg);		out_8((u8 ) MBX_CSR2_ADDR, in_8((u8 ) MBX_CSR2_ADDR) \| reg);
	@@ -529,9 +537,12 @@ static int voltage_set(int slot, int vcc, int vpp)

	reg = reg >> (slot << 2);		reg = reg >> (slot << 2);
	regread = in_8(&ccpld->fpga_pc_ctl);		regread = in_8(&ccpld->fpga_pc_ctl);
	if (reg != (regread & ((PCMCIA_VCC_MASK \| PCMCIA_VPP_MASK) >> (slot << 2)))) {		if (reg !=
			(regread & ((PCMCIA_VCC_MASK \| PCMCIA_VPP_MASK) >> (slot << 2)))) {
	/* enable new powersettings */		/* enable new powersettings */
	regread = regread & ~((PCMCIA_VCC_MASK \| PCMCIA_VPP_MASK) >> (slot << 2));		regread =
			regread & ~((PCMCIA_VCC_MASK \| PCMCIA_VPP_MASK) >>
			(slot << 2));
	out_8(&ccpld->fpga_pc_ctl, reg \| regread);		out_8(&ccpld->fpga_pc_ctl, reg \| regread);
	msleep(100);		msleep(100);
	}		}
	@@ -581,11 +592,9 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
	*/		*/
	if (events & SS_DETECT)		if (events & SS_DETECT)
	if (((pipr & M8XX_PCMCIA_CD2(i)) >> 1) ^		if (((pipr & M8XX_PCMCIA_CD2(i)) >> 1) ^
	(pipr & M8XX_PCMCIA_CD1(i)))		(pipr & M8XX_PCMCIA_CD1(i))) {
	{
	events &= ~SS_DETECT;		events &= ~SS_DETECT;
	}		}

	#ifdef PCMCIA_GLITCHY_CD		#ifdef PCMCIA_GLITCHY_CD
	/*		/*
	* I've experienced CD problems with my ADS board.		* I've experienced CD problems with my ADS board.
	@@ -607,8 +616,7 @@ static irqreturn_t m8xx_interrupt(int irq, void *dev)
	/* call the handler */		/* call the handler */

	dprintk("slot %u: events = 0x%02x, pscr = 0x%08x, "		dprintk("slot %u: events = 0x%02x, pscr = 0x%08x, "
	"pipr = 0x%08x\n",		"pipr = 0x%08x\n", i, events, pscr, pipr);
	i, events, pscr, pipr);

	if (events) {		if (events) {
	spin_lock(&pending_event_lock);		spin_lock(&pending_event_lock);
	@@ -829,12 +837,12 @@ static int m8xx_set_socket(struct pcmcia_socket sock, socket_state_t state)
	if (voltage_set(lsock, state->Vcc, state->Vpp))		if (voltage_set(lsock, state->Vcc, state->Vpp))
	return -EINVAL;		return -EINVAL;


	/* Take care of reset... */		/* Take care of reset... */
	if (state->flags & SS_RESET)		if (state->flags & SS_RESET)
	out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) \| M8XX_PGCRX_CXRESET); /* active high */		out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) \| M8XX_PGCRX_CXRESET); /* active high */
	else		else
	out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXRESET);		out_be32(M8XX_PGCRX(lsock),
			in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXRESET);

	/* ... and output enable. */		/* ... and output enable. */

	@@ -849,7 +857,8 @@ static int m8xx_set_socket(struct pcmcia_socket sock, socket_state_t state)
	if (state->Vcc \|\| state->Vpp)		if (state->Vcc \|\| state->Vpp)
	out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXOE); /* active low */		out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXOE); /* active low */
	else		else
	out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) \| M8XX_PGCRX_CXOE);		out_be32(M8XX_PGCRX(lsock),
			in_be32(M8XX_PGCRX(lsock)) \| M8XX_PGCRX_CXOE);

	/*		/*
	* We'd better turn off interrupts before		* We'd better turn off interrupts before
	@@ -886,7 +895,8 @@ static int m8xx_set_socket(struct pcmcia_socket sock, socket_state_t state)
	*/		*/
	if (state->io_irq) {		if (state->io_irq) {
	out_be32(M8XX_PGCRX(lsock),		out_be32(M8XX_PGCRX(lsock),
	in_be32(M8XX_PGCRX(lsock)) \| mk_int_int_mask(s->hwirq) << 24);		in_be32(M8XX_PGCRX(lsock)) \|
			mk_int_int_mask(s->hwirq) << 24);
	/*		/*
	* Strange thing here:		* Strange thing here:
	* The manual does not tell us which interrupt		* The manual does not tell us which interrupt
	@@ -897,11 +907,10 @@ static int m8xx_set_socket(struct pcmcia_socket sock, socket_state_t state)
	* have to be cleared in PSCR in the interrupt handler.		* have to be cleared in PSCR in the interrupt handler.
	*/		*/
	reg \|= M8XX_PCMCIA_RDY_L(lsock);		reg \|= M8XX_PCMCIA_RDY_L(lsock);
	}		} else
	else		out_be32(M8XX_PGCRX(lsock),
	out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & 0x00ffffff);		in_be32(M8XX_PGCRX(lsock)) & 0x00ffffff);
	}		} else {
	else {
	/*		/*
	* Memory card		* Memory card
	*/		*/
	@@ -940,7 +949,9 @@ static int m8xx_set_socket(struct pcmcia_socket sock, socket_state_t state)
	* Ones will enable the interrupt.		* Ones will enable the interrupt.
	*/		*/

	reg \|= in_be32(&pcmcia->pcmc_per) & (M8XX_PCMCIA_MASK(0) \| M8XX_PCMCIA_MASK(1));		reg \|=
			in_be32(&pcmcia->
			pcmc_per) & (M8XX_PCMCIA_MASK(0) \| M8XX_PCMCIA_MASK(1));
	out_be32(&pcmcia->pcmc_per, reg);		out_be32(&pcmcia->pcmc_per, reg);

	spin_unlock_irqrestore(&events_lock, flags);		spin_unlock_irqrestore(&events_lock, flags);
	@@ -961,7 +972,6 @@ static int m8xx_set_io_map(struct pcmcia_socket sock, struct pccard_io_map io)
	unsigned int reg, winnr;		unsigned int reg, winnr;
	pcmconf8xx_t *pcmcia = s->pcmcia;		pcmconf8xx_t *pcmcia = s->pcmcia;


	#define M8XX_SIZE (io->stop - io->start + 1)		#define M8XX_SIZE (io->stop - io->start + 1)
	#define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start)		#define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start)

	@@ -1029,15 +1039,14 @@ static int m8xx_set_io_map(struct pcmcia_socket sock, struct pccard_io_map io)

	/* copy the struct and modify the copy */		/* copy the struct and modify the copy */
	s->io_win[io->map] = *io;		s->io_win[io->map] = *io;
	s->io_win[io->map].flags &= (MAP_WRPROT		s->io_win[io->map].flags &= (MAP_WRPROT \| MAP_16BIT \| MAP_ACTIVE);
	\| MAP_16BIT
	\| MAP_ACTIVE);
	dprintk("SetIOMap exit\n");		dprintk("SetIOMap exit\n");

	return 0;		return 0;
	}		}

	static int m8xx_set_mem_map(struct pcmcia_socket sock, struct pccard_mem_map mem)		static int m8xx_set_mem_map(struct pcmcia_socket *sock,
			struct pccard_mem_map *mem)
	{		{
	int lsock = container_of(sock, struct socket_info, socket)->slot;		int lsock = container_of(sock, struct socket_info, socket)->slot;
	struct socket_info *s = &socket[lsock];		struct socket_info *s = &socket[lsock];
	@@ -1107,10 +1116,7 @@ static int m8xx_set_mem_map(struct pcmcia_socket sock, struct pccard_mem_map m
	old = &s->mem_win[mem->map];		old = &s->mem_win[mem->map];

	old = mem;		old = mem;
	old->flags &= (MAP_ATTRIB		old->flags &= (MAP_ATTRIB \| MAP_WRPROT \| MAP_16BIT \| MAP_ACTIVE);
	\| MAP_WRPROT
	\| MAP_16BIT
	\| MAP_ACTIVE);

	return 0;		return 0;
	}		}
	@@ -1151,7 +1157,8 @@ static struct pccard_operations m8xx_services = {
	.set_mem_map = m8xx_set_mem_map,		.set_mem_map = m8xx_set_mem_map,
	};		};

	static int __init m8xx_probe(struct of_device ofdev, const struct of_device_id match)		static int __init m8xx_probe(struct of_device *ofdev,
			const struct of_device_id *match)
	{		{
	struct pcmcia_win *w;		struct pcmcia_win *w;
	unsigned int i, m, hwirq;		unsigned int i, m, hwirq;
	@@ -1173,7 +1180,6 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
	m8xx_pgcrx[0] = &pcmcia->pcmc_pgcra;		m8xx_pgcrx[0] = &pcmcia->pcmc_pgcra;
	m8xx_pgcrx[1] = &pcmcia->pcmc_pgcrb;		m8xx_pgcrx[1] = &pcmcia->pcmc_pgcrb;


	pcmcia_info(PCMCIA_BOARD_MSG " using " PCMCIA_SLOT_MSG		pcmcia_info(PCMCIA_BOARD_MSG " using " PCMCIA_SLOT_MSG
	" with IRQ %u (%d). \n", pcmcia_schlvl, hwirq);		" with IRQ %u (%d). \n", pcmcia_schlvl, hwirq);

	@@ -1193,8 +1199,10 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id

	/* connect interrupt and disable CxOE */		/* connect interrupt and disable CxOE */

	out_be32(M8XX_PGCRX(0), M8XX_PGCRX_CXOE \| (mk_int_int_mask(hwirq) << 16));		out_be32(M8XX_PGCRX(0),
	out_be32(M8XX_PGCRX(1), M8XX_PGCRX_CXOE \| (mk_int_int_mask(hwirq) << 16));		M8XX_PGCRX_CXOE \| (mk_int_int_mask(hwirq) << 16));
			out_be32(M8XX_PGCRX(1),
			M8XX_PGCRX_CXOE \| (mk_int_int_mask(hwirq) << 16));

	/* intialize the fixed memory windows */		/* intialize the fixed memory windows */

	@@ -1221,7 +1229,8 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
	for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {		for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
	socket[i].slot = i;		socket[i].slot = i;
	socket[i].socket.owner = THIS_MODULE;		socket[i].socket.owner = THIS_MODULE;
	socket[i].socket.features = SS_CAP_PCCARD \| SS_CAP_MEM_ALIGN \| SS_CAP_STATIC_MAP;		socket[i].socket.features =
			SS_CAP_PCCARD \| SS_CAP_MEM_ALIGN \| SS_CAP_STATIC_MAP;
	socket[i].socket.irq_mask = 0x000;		socket[i].socket.irq_mask = 0x000;
	socket[i].socket.map_size = 0x1000;		socket[i].socket.map_size = 0x1000;
	socket[i].socket.io_offset = 0;		socket[i].socket.io_offset = 0;
	@@ -1234,7 +1243,6 @@ static int __init m8xx_probe(struct of_device *ofdev, const struct of_device_id
	socket[i].bus_freq = ppc_proc_freq;		socket[i].bus_freq = ppc_proc_freq;
	socket[i].hwirq = hwirq;		socket[i].hwirq = hwirq;


	}		}

	for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {		for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {