Loading qcom/kona-coresight.dtsi +2 −1 Original line number Original line Diff line number Diff line Loading @@ -103,6 +103,7 @@ reg-names = "tmc-base"; reg-names = "tmc-base"; coresight-name = "coresight-tmc-etf"; coresight-name = "coresight-tmc-etf"; coresight-ctis = <&cti0_swao &cti3_swao>; coresight-csr = <&swao_csr>; coresight-csr = <&swao_csr>; clocks = <&clock_aop QDSS_CLK>; clocks = <&clock_aop QDSS_CLK>; clock-names = "apb_pclk"; clock-names = "apb_pclk"; Loading Loading @@ -303,7 +304,7 @@ arm,scatter-gather; arm,scatter-gather; coresight-name = "coresight-tmc-etr"; coresight-name = "coresight-tmc-etr"; coresight-ctis = <&cti0 &cti0>; coresight-ctis = <&cti0 &cti3_swao>; coresight-csr = <&csr>; coresight-csr = <&csr>; clocks = <&clock_aop QDSS_CLK>; clocks = <&clock_aop QDSS_CLK>; Loading Loading
qcom/kona-coresight.dtsi +2 −1 Original line number Original line Diff line number Diff line Loading @@ -103,6 +103,7 @@ reg-names = "tmc-base"; reg-names = "tmc-base"; coresight-name = "coresight-tmc-etf"; coresight-name = "coresight-tmc-etf"; coresight-ctis = <&cti0_swao &cti3_swao>; coresight-csr = <&swao_csr>; coresight-csr = <&swao_csr>; clocks = <&clock_aop QDSS_CLK>; clocks = <&clock_aop QDSS_CLK>; clock-names = "apb_pclk"; clock-names = "apb_pclk"; Loading Loading @@ -303,7 +304,7 @@ arm,scatter-gather; arm,scatter-gather; coresight-name = "coresight-tmc-etr"; coresight-name = "coresight-tmc-etr"; coresight-ctis = <&cti0 &cti0>; coresight-ctis = <&cti0 &cti3_swao>; coresight-csr = <&csr>; coresight-csr = <&csr>; clocks = <&clock_aop QDSS_CLK>; clocks = <&clock_aop QDSS_CLK>; Loading