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Commit 98bb9222 authored by Yong Zhao's avatar Yong Zhao Committed by Oded Gabbay
Browse files

drm/amdkfd: Make SDMA engine number an ASIC-dependent variable 



On Raven there is only one SDMA engine instead of previously assumed two,
so we need to adapt our code to this new scenario.

Signed-off-by: default avatarYong Zhao <yong.zhao@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
parent f3ed5df8

drivers/gpu/drm/amd/amdkfd/kfd_device.c

+12 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ static const struct kfd_device_info kaveri_device_info = { 
	.supports_cwsr = false,

	.needs_iommu_device = true,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info carrizo_device_info = {
@@ -67,6 +68,7 @@ static const struct kfd_device_info carrizo_device_info = { 
	.supports_cwsr = true,

	.needs_iommu_device = true,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

};

#endif
@@ -83,6 +85,7 @@ static const struct kfd_device_info hawaii_device_info = { 
	.supports_cwsr = false,

	.needs_iommu_device = false,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info tonga_device_info = {
@@ -97,6 +100,7 @@ static const struct kfd_device_info tonga_device_info = { 
	.supports_cwsr = false,

	.needs_iommu_device = false,

	.needs_pci_atomics = true,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info tonga_vf_device_info = {
@@ -111,6 +115,7 @@ static const struct kfd_device_info tonga_vf_device_info = { 
	.supports_cwsr = false,

	.needs_iommu_device = false,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info fiji_device_info = {
@@ -125,6 +130,7 @@ static const struct kfd_device_info fiji_device_info = { 
	.supports_cwsr = true,

	.needs_iommu_device = false,

	.needs_pci_atomics = true,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info fiji_vf_device_info = {
@@ -139,6 +145,7 @@ static const struct kfd_device_info fiji_vf_device_info = { 
	.supports_cwsr = true,

	.needs_iommu_device = false,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

};
@@ -154,6 +161,7 @@ static const struct kfd_device_info polaris10_device_info = { 
	.supports_cwsr = true,

	.needs_iommu_device = false,

	.needs_pci_atomics = true,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info polaris10_vf_device_info = {
@@ -168,6 +176,7 @@ static const struct kfd_device_info polaris10_vf_device_info = { 
	.supports_cwsr = true,

	.needs_iommu_device = false,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info polaris11_device_info = {
@@ -182,6 +191,7 @@ static const struct kfd_device_info polaris11_device_info = { 
	.supports_cwsr = true,

	.needs_iommu_device = false,

	.needs_pci_atomics = true,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info vega10_device_info = {
@@ -196,6 +206,7 @@ static const struct kfd_device_info vega10_device_info = { 
	.supports_cwsr = true,

	.needs_iommu_device = false,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

};



static const struct kfd_device_info vega10_vf_device_info = {
@@ -210,6 +221,7 @@ static const struct kfd_device_info vega10_vf_device_info = { 
	.supports_cwsr = true,

	.needs_iommu_device = false,

	.needs_pci_atomics = false,

	.num_sdma_engines = 2,

};

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+20 −9
Original line number Diff line number Diff line
@@ -101,6 +101,17 @@ unsigned int get_pipes_per_mec(struct device_queue_manager *dqm) 
	return dqm->dev->shared_resources.num_pipe_per_mec;

}



static unsigned int get_num_sdma_engines(struct device_queue_manager *dqm)

{

	return dqm->dev->device_info->num_sdma_engines;

}



unsigned int get_num_sdma_queues(struct device_queue_manager *dqm)

{

	return dqm->dev->device_info->num_sdma_engines

			* KFD_SDMA_QUEUES_PER_ENGINE;

}



void program_sh_mem_settings(struct device_queue_manager *dqm,

					struct qcm_process_device *qpd)

{
@@ -855,7 +866,7 @@ static int initialize_nocpsch(struct device_queue_manager *dqm) 
	}



	dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1;

	dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;

	dqm->sdma_bitmap = (1 << get_num_sdma_queues(dqm)) - 1;



	return 0;

}
@@ -903,7 +914,7 @@ static int allocate_sdma_queue(struct device_queue_manager *dqm, 
static void deallocate_sdma_queue(struct device_queue_manager *dqm,

				unsigned int sdma_queue_id)

{

	if (sdma_queue_id >= CIK_SDMA_QUEUES)

	if (sdma_queue_id >= get_num_sdma_queues(dqm))

		return;

	dqm->sdma_bitmap |= (1 << sdma_queue_id);

}
@@ -923,8 +934,8 @@ static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm, 
	if (retval)

		return retval;



	q->properties.sdma_queue_id = q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;

	q->properties.sdma_engine_id = q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;

	q->properties.sdma_queue_id = q->sdma_id / get_num_sdma_engines(dqm);

	q->properties.sdma_engine_id = q->sdma_id % get_num_sdma_engines(dqm);



	retval = allocate_doorbell(qpd, q);

	if (retval)
@@ -1011,7 +1022,7 @@ static int initialize_cpsch(struct device_queue_manager *dqm) 
	dqm->queue_count = dqm->processes_count = 0;

	dqm->sdma_queue_count = 0;

	dqm->active_runlist = false;

	dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;

	dqm->sdma_bitmap = (1 << get_num_sdma_queues(dqm)) - 1;



	INIT_WORK(&dqm->hw_exception_work, kfd_process_hw_exception);
@@ -1142,9 +1153,9 @@ static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q, 
		if (retval)

			goto out_unlock;

		q->properties.sdma_queue_id =

			q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;

			q->sdma_id / get_num_sdma_engines(dqm);

		q->properties.sdma_engine_id =

			q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;

			q->sdma_id % get_num_sdma_engines(dqm);

	}



	retval = allocate_doorbell(qpd, q);
@@ -1791,8 +1802,8 @@ int dqm_debugfs_hqds(struct seq_file *m, void *data) 
		}

	}



	for (pipe = 0; pipe < CIK_SDMA_ENGINE_NUM; pipe++) {

		for (queue = 0; queue < CIK_SDMA_QUEUES_PER_ENGINE; queue++) {

	for (pipe = 0; pipe < get_num_sdma_engines(dqm); pipe++) {

		for (queue = 0; queue < KFD_SDMA_QUEUES_PER_ENGINE; queue++) {

			r = dqm->dev->kfd2kgd->hqd_sdma_dump(

				dqm->dev->kgd, pipe, queue, &dump, &n_regs);

			if (r)

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h

+2 −4
Original line number Diff line number Diff line
@@ -33,10 +33,7 @@ 


#define KFD_UNMAP_LATENCY_MS			(4000)

#define QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS (2 * KFD_UNMAP_LATENCY_MS + 1000)



#define CIK_SDMA_QUEUES				(4)

#define CIK_SDMA_QUEUES_PER_ENGINE		(2)

#define CIK_SDMA_ENGINE_NUM			(2)

#define KFD_SDMA_QUEUES_PER_ENGINE		(2)



struct device_process_node {

	struct qcm_process_device *qpd;
@@ -214,6 +211,7 @@ void program_sh_mem_settings(struct device_queue_manager *dqm, 
unsigned int get_queues_num(struct device_queue_manager *dqm);

unsigned int get_queues_per_pipe(struct device_queue_manager *dqm);

unsigned int get_pipes_per_mec(struct device_queue_manager *dqm);

unsigned int get_num_sdma_queues(struct device_queue_manager *dqm);



static inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)

{

drivers/gpu/drm/amd/amdkfd/kfd_priv.h

+1 −0
Original line number Diff line number Diff line
@@ -203,6 +203,7 @@ struct kfd_device_info { 
	bool supports_cwsr;

	bool needs_iommu_device;

	bool needs_pci_atomics;

	unsigned int num_sdma_engines;

};



struct kfd_mem_obj {

drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c

+1 −2
Original line number Diff line number Diff line
@@ -186,8 +186,7 @@ int pqm_create_queue(struct process_queue_manager *pqm, 


	switch (type) {

	case KFD_QUEUE_TYPE_SDMA:

		if (dev->dqm->queue_count >=

			CIK_SDMA_QUEUES_PER_ENGINE * CIK_SDMA_ENGINE_NUM) {

		if (dev->dqm->queue_count >= get_num_sdma_queues(dev->dqm)) {

			pr_err("Over-subscription is not allowed for SDMA.\n");

			retval = -EPERM;

			goto err_create_queue;