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Commit 9843dca8 authored by Venkata Narendra Kumar Gutta's avatar Venkata Narendra Kumar Gutta
Browse files

ARM: dts: qcom: Update CPU cache dump table entries 

CPU cache dump table entries are not able to accommodate the
full cache dumps. Update the cache dump table sizes with
appropriate values.

Change-Id: I162d2efab148b9d9fc2eee96f23fb9ca0d90824e
parent 514cd500

qcom/kona.dtsi

+20 −20
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ 


			L1_I_0: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_0: l1-dcache {
@@ -93,7 +93,7 @@ 
			};



			L2_TLB_0: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x6000>;

			};

		};
@@ -117,7 +117,7 @@ 


			L1_I_100: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_100: l1-dcache {
@@ -126,7 +126,7 @@ 
			};



			L2_TLB_100: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x6000>;

			};

		};
@@ -150,7 +150,7 @@ 


			L1_I_200: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_200: l1-dcache {
@@ -159,7 +159,7 @@ 
			};



			L2_TLB_200: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x6000>;

			};

		};
@@ -183,7 +183,7 @@ 


			L1_I_300: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_300: l1-dcache {
@@ -192,7 +192,7 @@ 
			};



			L2_TLB_300: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x6000>;

			};

		};
@@ -213,17 +213,17 @@ 
			      cache-size = <0x40000>;

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x48000>;

			      qcom,dump-size = <0x68000>;

			};



			L1_I_400: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x15000>;

				qcom,dump-size = <0x26000>;

			};



			L1_D_400: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x12000>;

				qcom,dump-size = <0x1A000>;

			};



			L1_ITLB_400: l1-itlb {
@@ -255,17 +255,17 @@ 
			      cache-size = <0x40000>;

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x48000>;

			      qcom,dump-size = <0x68000>;

			};



			L1_I_500: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x15000>;

				qcom,dump-size = <0x26000>;

			};



			L1_D_500: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x12000>;

				qcom,dump-size = <0x1A000>;

			};



			L1_ITLB_500: l1-itlb {
@@ -297,17 +297,17 @@ 
			      cache-size = <0x40000>;

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x48000>;

			      qcom,dump-size = <0x68000>;

			};



			L1_I_600: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x15000>;

				qcom,dump-size = <0x26000>;

			};



			L1_D_600: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x12000>;

				qcom,dump-size = <0x1A000>;

			};



			L1_ITLB_600: l1-itlb {
@@ -340,17 +340,17 @@ 
			      cache-size = <0x80000>;

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x90000>;

			      qcom,dump-size = <0xD0000>;

			};



			L1_I_700: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x15000>;

				qcom,dump-size = <0x26000>;

			};



			L1_D_700: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x12000>;

				qcom,dump-size = <0x1A000>;

			};



			L1_ITLB_700: l1-itlb {