Merge "msm: camera: isp: camif lite for rdi, pd and LCR" (97ffec62) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

+11 −9

Original line number	Diff line number	Diff line
		@@ -945,8 +945,9 @@ static int cam_ife_hw_mgr_acquire_res_ife_out(

		switch (ife_src_res->res_id) {
		case CAM_ISP_HW_VFE_IN_CAMIF:
		case CAM_ISP_HW_VFE_IN_CAMIF_LITE:
		case CAM_ISP_HW_VFE_IN_PDLIB:
		case CAM_ISP_HW_VFE_IN_RD:
		case CAM_ISP_HW_VFE_IN_LCR:
		rc = cam_ife_hw_mgr_acquire_res_ife_out_pixel(ife_ctx,
		ife_src_res, in_port);
		break;
		@@ -1143,7 +1144,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_src(
		break;
		case CAM_IFE_PIX_PATH_RES_PPP:
		vfe_acquire.vfe_in.res_id =
		CAM_ISP_HW_VFE_IN_CAMIF_LITE;
		CAM_ISP_HW_VFE_IN_PDLIB;
		vfe_acquire.vfe_in.sync_mode = CAM_ISP_HW_SYNC_NONE;

		break;
		@@ -2257,7 +2258,7 @@ static int cam_isp_blob_bw_update(
		ext_bw_bps =
		bw_config->rdi_vote[idx].ext_bw_bps;
		} else if (hw_mgr_res->res_id ==
		CAM_ISP_HW_VFE_IN_CAMIF_LITE) {
		CAM_ISP_HW_VFE_IN_PDLIB) {
		if (i == CAM_ISP_HW_SPLIT_LEFT) {
		if (camif_l_bw_updated)
		continue;
		@@ -2279,13 +2280,14 @@ static int cam_isp_blob_bw_update(

		camif_r_bw_updated = true;
		}
		} else
		} else {
		if (hw_mgr_res->hw_res[i]) {
		CAM_ERR(CAM_ISP, "Invalid res_id %u",
		hw_mgr_res->res_id);
		rc = -EINVAL;
		return rc;
		}
		}

		hw_intf = hw_mgr_res->hw_res[i]->hw_intf;
		if (hw_intf && hw_intf->hw_ops.process_cmd) {
		@@ -3431,7 +3433,7 @@ static int cam_isp_blob_clock_update(
		camif_r_clk_updated = true;
		}
		} else if (hw_mgr_res->res_id ==
		CAM_ISP_HW_VFE_IN_CAMIF_LITE) {
		CAM_ISP_HW_VFE_IN_PDLIB) {
		if (i == CAM_ISP_HW_SPLIT_LEFT) {
		if (camif_l_clk_updated)
		continue;
		@@ -4409,7 +4411,7 @@ static int cam_ife_hw_mgr_handle_reg_update(
		CAM_DBG(CAM_ISP, "resource id = %d, curr_core_idx = %d",
		ife_src_res->res_id, core_idx);
		switch (ife_src_res->res_id) {
		case CAM_ISP_HW_VFE_IN_CAMIF_LITE:
		case CAM_ISP_HW_VFE_IN_PDLIB:
		break;
		case CAM_ISP_HW_VFE_IN_CAMIF:
		case CAM_ISP_HW_VFE_IN_RD:
		@@ -4910,7 +4912,7 @@ static int cam_ife_hw_mgr_handle_sof(
		sof_sent = true;
		}
		break;
		case CAM_ISP_HW_VFE_IN_CAMIF_LITE:
		case CAM_ISP_HW_VFE_IN_PDLIB:
		break;
		default:
		CAM_ERR(CAM_ISP, "Invalid resource id :%d",

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/include/cam_vfe_hw_intf.h

+2 −1

Original line number	Diff line number	Diff line
		@@ -26,7 +26,8 @@ enum cam_isp_hw_vfe_in_mux {
		CAM_ISP_HW_VFE_IN_RDI1 = 4,
		CAM_ISP_HW_VFE_IN_RDI2 = 5,
		CAM_ISP_HW_VFE_IN_RDI3 = 6,
		CAM_ISP_HW_VFE_IN_CAMIF_LITE = 7,
		CAM_ISP_HW_VFE_IN_PDLIB = 7,
		CAM_ISP_HW_VFE_IN_LCR = 8,
		CAM_ISP_HW_VFE_IN_MAX,
		};

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe480.h

+156 −25

Original line number	Diff line number	Diff line
		@@ -7,14 +7,10 @@
		#ifndef _CAM_VFE480_H_
		#define _CAM_VFE480_H_
		#include "cam_vfe_camif_ver3.h"
		#include "cam_vfe_camif_ver2.h"
		#include "cam_vfe_camif_lite_ver2.h"
		#include "cam_vfe_top_ver2.h"
		#include "cam_vfe_top_ver3.h"
		#include "cam_vfe_core.h"
		#include "cam_vfe_bus_ver3.h"
		#include "cam_irq_controller.h"
		#include "cam_vfe175.h"

		static struct cam_irq_register_set vfe480_top_irq_reg_set[3] = {
		{
		@@ -109,26 +105,153 @@ static struct cam_vfe_top_ver3_reg_offset_common vfe480_top_common_reg = {
		.diag_sensor_status_1 = 0x00000098,
		};

		static struct cam_vfe_rdi_ver2_reg vfe480_rdi_reg = {
		.reg_update_cmd = 0x000004AC,
		static struct cam_vfe_camif_lite_ver3_reg vfe480_camif_rdi[3] = {
		{
		.lite_hw_version = 0x9A00,
		.lite_hw_status = 0x9A04,
		.lite_module_config = 0x9A60,
		.lite_skip_period = 0x9A68,
		.lite_irq_subsample_pattern = 0x9A6C,
		.lite_epoch_irq = 0x9A70,
		.lite_debug_1 = 0x9BF0,
		.lite_debug_0 = 0x9BF4,
		.lite_test_bus_ctrl = 0x9BF8,
		.camif_lite_spare = 0x9BFC,
		.reg_update_cmd = 0x34,
		},
		{
		.lite_hw_version = 0x9C00,
		.lite_hw_status = 0x9C04,
		.lite_module_config = 0x9C60,
		.lite_skip_period = 0x9C68,
		.lite_irq_subsample_pattern = 0x9C6C,
		.lite_epoch_irq = 0x9C70,
		.lite_debug_1 = 0x9DF0,
		.lite_debug_0 = 0x9DF4,
		.lite_test_bus_ctrl = 0x9DF8,
		.camif_lite_spare = 0x9DFC,
		.reg_update_cmd = 0x34,
		},
		{
		.lite_hw_version = 0x9E00,
		.lite_hw_status = 0x9E04,
		.lite_module_config = 0x9E60,
		.lite_skip_period = 0x9E68,
		.lite_irq_subsample_pattern = 0x9E6C,
		.lite_epoch_irq = 0x9E70,
		.lite_debug_1 = 0x9FF0,
		.lite_debug_0 = 0x9FF4,
		.lite_test_bus_ctrl = 0x9FF8,
		.camif_lite_spare = 0x9FFC,
		.reg_update_cmd = 0x34,
		},
		};

		static struct cam_vfe_rdi_reg_data vfe_480_rdi_0_data = {
		static struct cam_vfe_camif_lite_ver3_reg_data vfe480_camif_rdi_reg_data[3] = {
		{
		.extern_reg_update_shift = 0,
		.reg_update_cmd_data = 0x2,
		.sof_irq_mask = 0x8000000,
		.reg_update_irq_mask = 0x20,
		.epoch_line_cfg = 0x00140014,
		.sof_irq_mask = 0x10,
		.epoch0_irq_mask = 0x40,
		.epoch1_irq_mask = 0x80,
		.eof_irq_mask = 0x20,
		.error_irq_mask0 = 0x20000000,
		.error_irq_mask2 = 0x20000,
		.enable_diagnostic_hw = 0x1,
		},
		{
		.extern_reg_update_shift = 0,
		.reg_update_cmd_data = 0x4,
		.epoch_line_cfg = 0x00140014,
		.sof_irq_mask = 0x100,
		.epoch0_irq_mask = 0x400,
		.epoch1_irq_mask = 0x800,
		.eof_irq_mask = 0x200,
		.error_irq_mask0 = 0x10000000,
		.error_irq_mask2 = 0x40000,
		.enable_diagnostic_hw = 0x1,
		},
		{
		.extern_reg_update_shift = 0,
		.reg_update_cmd_data = 0x8,
		.epoch_line_cfg = 0x00140014,
		.sof_irq_mask = 0x1000,
		.epoch0_irq_mask = 0x4000,
		.epoch1_irq_mask = 0x8000,
		.eof_irq_mask = 0x2000,
		.error_irq_mask0 = 0x8000000,
		.error_irq_mask2 = 0x80000,
		.enable_diagnostic_hw = 0x1,
		},
		};

		static struct cam_vfe_rdi_reg_data vfe_480_rdi_1_data = {
		.reg_update_cmd_data = 0x4,
		.sof_irq_mask = 0x10000000,
		.reg_update_irq_mask = 0x40,
		static struct cam_vfe_camif_lite_ver3_reg vfe480_camif_lcr = {
		.lite_hw_version = 0xA000,
		.lite_hw_status = 0xA004,
		.lite_module_config = 0xA060,
		.lite_skip_period = 0xA068,
		.lite_irq_subsample_pattern = 0xA06C,
		.lite_epoch_irq = 0xA070,
		.lite_debug_1 = 0xA1F0,
		.lite_debug_0 = 0xA1F4,
		.lite_test_bus_ctrl = 0xA1F8,
		.camif_lite_spare = 0xA1FC,
		};

		static struct cam_vfe_rdi_reg_data vfe_480_rdi_2_data = {
		.reg_update_cmd_data = 0x8,
		.sof_irq_mask = 0x20000000,
		.reg_update_irq_mask = 0x80,
		static struct cam_vfe_camif_lite_ver3_reg_data vfe480_camif_lcr_reg_data = {
		.extern_reg_update_shift = 16,
		.reg_update_cmd_data = 0x40,
		.epoch_line_cfg = 0x00140014,
		.sof_irq_mask = 0x100000,
		.epoch0_irq_mask = 0x400000,
		.epoch1_irq_mask = 0x800000,
		.eof_irq_mask = 0x200000,
		.error_irq_mask0 = 0x18000,
		.enable_diagnostic_hw = 0x1,
		};

		static struct cam_vfe_camif_lite_ver3_reg vfe480_camif_pd = {
		.lite_hw_version = 0xA400,
		.lite_hw_status = 0xA404,
		.lite_module_config = 0xA460,
		.lite_skip_period = 0xA468,
		.lite_irq_subsample_pattern = 0xA46C,
		.lite_epoch_irq = 0xA470,
		.lite_debug_1 = 0xA5F0,
		.lite_debug_0 = 0xA5F4,
		.lite_test_bus_ctrl = 0xA5F8,
		.camif_lite_spare = 0xA5FC,
		};

		static struct cam_vfe_camif_lite_ver3_reg_data vfe480_camif_pd_reg_data = {
		.extern_reg_update_shift = 17,
		.reg_update_cmd_data = 0x20,
		.epoch_line_cfg = 0x00140014,
		.sof_irq_mask = 0x10000,
		.epoch0_irq_mask = 0x40000,
		.epoch1_irq_mask = 0x80000,
		.eof_irq_mask = 0x20000,
		.error_irq_mask0 = 0x6000,
		.enable_diagnostic_hw = 0x1,
		};

		struct cam_vfe_camif_lite_ver3_hw_info rdi_hw_info_arr[CAM_VFE_RDI_VER2_MAX] = {
		{
		.common_reg = &vfe480_top_common_reg,
		.camif_lite_reg = &vfe480_camif_rdi[0],
		.reg_data = &vfe480_camif_rdi_reg_data[0],
		},
		{
		.common_reg = &vfe480_top_common_reg,
		.camif_lite_reg = &vfe480_camif_rdi[1],
		.reg_data = &vfe480_camif_rdi_reg_data[1],
		},
		{
		.common_reg = &vfe480_top_common_reg,
		.camif_lite_reg = &vfe480_camif_rdi[2],
		.reg_data = &vfe480_camif_rdi_reg_data[2],
		},
		};

		static struct cam_vfe_top_ver3_hw_info vfe480_top_hw_info = {
		@@ -138,12 +261,26 @@ static struct cam_vfe_top_ver3_hw_info vfe480_top_hw_info = {
		.camif_reg = &vfe480_camif_reg,
		.reg_data = &vfe_480_camif_reg_data,
		},
		.pdlib_hw_info = {
		.common_reg = &vfe480_top_common_reg,
		.camif_lite_reg = &vfe480_camif_pd,
		.reg_data = &vfe480_camif_pd_reg_data,
		},
		.rdi_hw_info[0] = &rdi_hw_info_arr[0],
		.rdi_hw_info[1] = &rdi_hw_info_arr[1],
		.rdi_hw_info[2] = &rdi_hw_info_arr[2],
		.lcr_hw_info = {
		.common_reg = &vfe480_top_common_reg,
		.camif_lite_reg = &vfe480_camif_lcr,
		.reg_data = &vfe480_camif_lcr_reg_data,
		},
		.mux_type = {
		CAM_VFE_CAMIF_VER_3_0,
		CAM_VFE_RDI_VER_1_0,
		CAM_VFE_RDI_VER_1_0,
		CAM_VFE_RDI_VER_1_0,
		CAM_VFE_CAMIF_LITE_VER_2_0,
		CAM_VFE_PDLIB_VER_1_0,
		CAM_VFE_LCR_VER_1_0,
		},
		};

		@@ -1174,12 +1311,6 @@ struct cam_vfe_hw_info cam_vfe480_hw_info = {

		.top_version = CAM_VFE_TOP_VER_3_0,
		.top_hw_info = &vfe480_top_hw_info,

		.camif_version = CAM_VFE_CAMIF_VER_3_0,
		.camif_reg = &vfe480_camif_reg,

		.camif_lite_version = CAM_VFE_CAMIF_LITE_VER_2_0,
		.camif_lite_reg = &vfe175_camif_lite_reg,
		};

		#endif /* _CAM_VFE480_H_ */

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -14,4 +14,4 @@ ccflags-y += -Idrivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_h

		obj-$(CONFIG_SPECTRA_CAMERA) += cam_vfe_camif_lite_ver2.o cam_vfe_top.o
		obj-$(CONFIG_SPECTRA_CAMERA) += cam_vfe_top_ver3.o cam_vfe_top_ver2.o cam_vfe_camif_ver2.o
		obj-$(CONFIG_SPECTRA_CAMERA) += cam_vfe_camif_ver3.o cam_vfe_rdi.o cam_vfe_fe_ver1.o
		obj-$(CONFIG_SPECTRA_CAMERA) += cam_vfe_camif_ver3.o cam_vfe_rdi.o cam_vfe_fe_ver1.o cam_vfe_camif_lite_ver3.o

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_lite_ver3.c

0 → 100644

+359 −0

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2019, The Linux Foundation. All rights reserved.
		*/

		#include <linux/slab.h>
		#include <uapi/media/cam_isp.h>
		#include "cam_io_util.h"
		#include "cam_isp_hw_mgr_intf.h"
		#include "cam_isp_hw.h"
		#include "cam_vfe_hw_intf.h"
		#include "cam_vfe_soc.h"
		#include "cam_vfe_top.h"
		#include "cam_vfe_top_ver3.h"
		#include "cam_vfe_camif_lite_ver3.h"
		#include "cam_debug_util.h"
		#include "cam_cdm_util.h"

		struct cam_vfe_mux_camif_lite_data {
		void __iomem *mem_base;
		struct cam_hw_intf *hw_intf;
		struct cam_vfe_camif_lite_ver3_reg *camif_lite_reg;
		struct cam_vfe_top_ver3_reg_offset_common *common_reg;
		struct cam_vfe_camif_lite_ver3_reg_data *reg_data;
		struct cam_hw_soc_info *soc_info;
		enum cam_isp_hw_sync_mode sync_mode;
		};

		static int cam_vfe_camif_lite_get_reg_update(
		struct cam_isp_resource_node *camif_lite_res,
		void *cmd_args,
		uint32_t arg_size)
		{
		uint32_t size = 0;
		uint32_t reg_val_pair[2];
		struct cam_isp_hw_get_cmd_update *cdm_args = cmd_args;
		struct cam_cdm_utils_ops *cdm_util_ops = NULL;
		struct cam_vfe_mux_camif_lite_data *rsrc_data = NULL;

		if (arg_size != sizeof(struct cam_isp_hw_get_cmd_update)) {
		CAM_ERR(CAM_ISP, "Invalid cmd size");
		return -EINVAL;
		}

		if (!cdm_args \|\| !cdm_args->res) {
		CAM_ERR(CAM_ISP,
		"Invalid args: cdm args %pK", cdm_args);
		return -EINVAL;
		}

		CAM_DBG(CAM_ISP, "res id %d", camif_lite_res->res_id);

		cdm_util_ops = (struct cam_cdm_utils_ops *)cdm_args->res->cdm_ops;

		if (!cdm_util_ops) {
		CAM_ERR(CAM_ISP, "Invalid CDM ops");
		return -EINVAL;
		}

		size = cdm_util_ops->cdm_required_size_reg_random(1);
		/* since cdm returns dwords, we need to convert it into bytes */
		if ((size * 4) > cdm_args->cmd.size) {
		CAM_ERR(CAM_ISP, "buf size:%d is not sufficient, expected: %d",
		cdm_args->cmd.size, size);
		return -EINVAL;
		}

		rsrc_data = camif_lite_res->res_priv;
		reg_val_pair[0] = rsrc_data->camif_lite_reg->reg_update_cmd;
		reg_val_pair[1] = rsrc_data->reg_data->reg_update_cmd_data;
		CAM_DBG(CAM_ISP, "CAMIF Lite reg_update_cmd 0x%x offset 0x%x",
		reg_val_pair[1], reg_val_pair[0]);

		cdm_util_ops->cdm_write_regrandom(cdm_args->cmd.cmd_buf_addr,
		1, reg_val_pair);

		cdm_args->cmd.used_bytes = size * 4;

		return 0;
		}

		int cam_vfe_camif_lite_ver3_acquire_resource(
		struct cam_isp_resource_node *camif_lite_res,
		void *acquire_param)
		{
		struct cam_vfe_mux_camif_lite_data *camif_lite_data;
		struct cam_vfe_acquire_args *acquire_data;

		if (!camif_lite_res) {
		CAM_ERR(CAM_ISP, "Error Invalid input arguments");
		return -EINVAL;
		}

		camif_lite_data = (struct cam_vfe_mux_camif_lite_data *)
		camif_lite_res->res_priv;
		acquire_data = (struct cam_vfe_acquire_args *)acquire_param;

		camif_lite_data->sync_mode = acquire_data->vfe_in.sync_mode;

		CAM_DBG(CAM_ISP, "hw id:%d sync_mode=%d",
		camif_lite_res->hw_intf->hw_idx,
		camif_lite_data->sync_mode);
		return 0;
		}

		static int cam_vfe_camif_lite_resource_start(
		struct cam_isp_resource_node *camif_lite_res)
		{
		struct cam_vfe_mux_camif_lite_data *rsrc_data;
		uint32_t val = 0;

		if (!camif_lite_res) {
		CAM_ERR(CAM_ISP, "Invalid input arguments");
		return -EINVAL;
		}

		if (camif_lite_res->res_state != CAM_ISP_RESOURCE_STATE_RESERVED) {
		CAM_ERR(CAM_ISP, "Invalid camif lite res res_state:%d",
		camif_lite_res->res_state);
		return -EINVAL;
		}

		CAM_DBG(CAM_ISP, "res id %d", camif_lite_res->res_id);

		rsrc_data = (struct cam_vfe_mux_camif_lite_data *)
		camif_lite_res->res_priv;

		/* vfe core config */
		val = cam_io_r_mb(rsrc_data->mem_base +
		rsrc_data->common_reg->core_cfg_0);

		if (camif_lite_res->res_id == CAM_ISP_HW_VFE_IN_PDLIB &&
		camif_lite_res->res_id == CAM_ISP_HW_VFE_IN_LCR &&
		rsrc_data->sync_mode == CAM_ISP_HW_SYNC_SLAVE)
		val \|= (1 << rsrc_data->reg_data->extern_reg_update_shift);

		cam_io_w_mb(val, rsrc_data->mem_base +
		rsrc_data->common_reg->core_cfg_0);

		CAM_DBG(CAM_ISP, "hw id:%d core_cfg val:%d",
		camif_lite_res->hw_intf->hw_idx, val);

		/* epoch config with 20 line */
		cam_io_w_mb(rsrc_data->reg_data->epoch_line_cfg,
		rsrc_data->mem_base +
		rsrc_data->camif_lite_reg->lite_epoch_irq);

		/* Enable Camif */
		cam_io_w_mb(0x1,
		rsrc_data->mem_base +
		rsrc_data->camif_lite_reg->lite_module_config);

		camif_lite_res->res_state = CAM_ISP_RESOURCE_STATE_STREAMING;

		/* Reg Update */
		cam_io_w_mb(rsrc_data->reg_data->reg_update_cmd_data,
		rsrc_data->mem_base +
		rsrc_data->camif_lite_reg->reg_update_cmd);

		CAM_DBG(CAM_ISP, "Start Camif Lite IFE %d Done",
		camif_lite_res->hw_intf->hw_idx);
		return 0;
		}

		static int cam_vfe_camif_lite_resource_stop(
		struct cam_isp_resource_node *camif_lite_res)
		{
		struct cam_vfe_mux_camif_lite_data *rsrc_data;

		if (!camif_lite_res) {
		CAM_ERR(CAM_ISP, "Invalid input arguments");
		return -EINVAL;
		}

		CAM_DBG(CAM_ISP, "res id %d", camif_lite_res->res_id);

		if ((camif_lite_res->res_state == CAM_ISP_RESOURCE_STATE_RESERVED) \|\|
		(camif_lite_res->res_state == CAM_ISP_RESOURCE_STATE_AVAILABLE))
		return 0;

		rsrc_data =
		(struct cam_vfe_mux_camif_lite_data *)camif_lite_res->res_priv;

		/* Disable Camif */
		cam_io_w_mb(0x0,
		rsrc_data->mem_base +
		rsrc_data->camif_lite_reg->lite_module_config);

		if (camif_lite_res->res_state == CAM_ISP_RESOURCE_STATE_STREAMING)
		camif_lite_res->res_state = CAM_ISP_RESOURCE_STATE_RESERVED;

		return 0;
		}

		static int cam_vfe_camif_lite_process_cmd(
		struct cam_isp_resource_node *rsrc_node,
		uint32_t cmd_type, void *cmd_args, uint32_t arg_size)
		{
		int rc = -EINVAL;

		if (!rsrc_node \|\| !cmd_args) {
		CAM_ERR(CAM_ISP, "Invalid input arguments");
		return -EINVAL;
		}

		switch (cmd_type) {
		case CAM_ISP_HW_CMD_GET_REG_UPDATE:
		rc = cam_vfe_camif_lite_get_reg_update(rsrc_node, cmd_args,
		arg_size);
		break;
		default:
		CAM_ERR(CAM_ISP,
		"unsupported process command:%d", cmd_type);
		break;
		}

		return rc;
		}

		static int cam_vfe_camif_lite_handle_irq_top_half(uint32_t evt_id,
		struct cam_irq_th_payload *th_payload)
		{
		return -EPERM;
		}

		static int cam_vfe_camif_lite_handle_irq_bottom_half(
		void *handler_priv,
		void *evt_payload_priv)
		{
		int ret = CAM_VFE_IRQ_STATUS_ERR;
		struct cam_isp_resource_node *camif_lite_node;
		struct cam_vfe_mux_camif_lite_data *camif_lite_priv;
		struct cam_vfe_top_irq_evt_payload *payload;
		uint32_t irq_status0;
		uint32_t irq_status1;
		uint32_t irq_status2;

		if (!handler_priv \|\| !evt_payload_priv) {
		CAM_ERR(CAM_ISP, "Invalid params");
		return ret;
		}

		camif_lite_node = handler_priv;
		camif_lite_priv = camif_lite_node->res_priv;
		payload = evt_payload_priv;
		irq_status0 = payload->irq_reg_val[CAM_IFE_IRQ_CAMIF_REG_STATUS0];
		irq_status1 = payload->irq_reg_val[CAM_IFE_IRQ_CAMIF_REG_STATUS1];
		irq_status2 = payload->irq_reg_val[CAM_IFE_IRQ_VIOLATION_STATUS];

		CAM_DBG(CAM_ISP, "event ID:%d", payload->evt_id);
		CAM_DBG(CAM_ISP,
		"irq_status_0 = 0x%x, irq_status_0 = 0x%x, irq_status_0 = 0x%x",
		irq_status0, irq_status1, irq_status2);

		switch (payload->evt_id) {
		case CAM_ISP_HW_EVENT_SOF:
		if (irq_status1 &
		camif_lite_priv->reg_data->sof_irq_mask) {
		CAM_DBG(CAM_ISP, "Received SOF");
		ret = CAM_VFE_IRQ_STATUS_SUCCESS;
		}
		break;
		case CAM_ISP_HW_EVENT_EPOCH:
		if (irq_status1 &
		camif_lite_priv->reg_data->epoch0_irq_mask) {
		CAM_DBG(CAM_ISP, "Received EPOCH");
		ret = CAM_VFE_IRQ_STATUS_SUCCESS;
		}
		break;
		case CAM_ISP_HW_EVENT_EOF:
		if (irq_status1 &
		camif_lite_priv->reg_data->eof_irq_mask) {
		CAM_DBG(CAM_ISP, "Received EOF\n");
		ret = CAM_VFE_IRQ_STATUS_SUCCESS;
		}
		break;
		case CAM_ISP_HW_EVENT_ERROR:
		if ((irq_status0 &
		camif_lite_priv->reg_data->error_irq_mask0) \|\|
		(irq_status2 &
		camif_lite_priv->reg_data->error_irq_mask2)) {
		CAM_ERR(CAM_ISP, "Received ERROR\n");
		ret = CAM_ISP_HW_ERROR_OVERFLOW;
		} else {
		ret = CAM_ISP_HW_ERROR_NONE;
		}
		break;
		default:
		break;
		}

		CAM_DBG(CAM_ISP, "returning status = %d", ret);
		return ret;
		}

		int cam_vfe_camif_lite_ver3_init(
		struct cam_hw_intf *hw_intf,
		struct cam_hw_soc_info *soc_info,
		void *camif_lite_hw_info,
		struct cam_isp_resource_node *camif_lite_node)
		{
		struct cam_vfe_mux_camif_lite_data *camif_lite_priv = NULL;
		struct cam_vfe_camif_lite_ver3_hw_info *camif_lite_info =
		camif_lite_hw_info;

		CAM_DBG(CAM_ISP, "res id %d", camif_lite_node->res_id);

		camif_lite_priv = kzalloc(sizeof(*camif_lite_priv),
		GFP_KERNEL);
		if (!camif_lite_priv)
		return -ENOMEM;

		camif_lite_node->res_priv = camif_lite_priv;

		camif_lite_priv->mem_base =
		soc_info->reg_map[VFE_CORE_BASE_IDX].mem_base;
		camif_lite_priv->camif_lite_reg = camif_lite_info->camif_lite_reg;
		camif_lite_priv->common_reg = camif_lite_info->common_reg;
		camif_lite_priv->reg_data = camif_lite_info->reg_data;
		camif_lite_priv->hw_intf = hw_intf;
		camif_lite_priv->soc_info = soc_info;

		camif_lite_node->init = NULL;
		camif_lite_node->deinit = NULL;
		camif_lite_node->start = cam_vfe_camif_lite_resource_start;
		camif_lite_node->stop = cam_vfe_camif_lite_resource_stop;
		camif_lite_node->process_cmd = cam_vfe_camif_lite_process_cmd;
		camif_lite_node->top_half_handler =
		cam_vfe_camif_lite_handle_irq_top_half;
		camif_lite_node->bottom_half_handler =
		cam_vfe_camif_lite_handle_irq_bottom_half;

		return 0;
		}

		int cam_vfe_camif_lite_ver3_deinit(
		struct cam_isp_resource_node *camif_lite_node)
		{
		struct cam_vfe_mux_camif_data *camif_lite_priv =
		camif_lite_node->res_priv;

		camif_lite_node->start = NULL;
		camif_lite_node->stop = NULL;
		camif_lite_node->process_cmd = NULL;
		camif_lite_node->top_half_handler = NULL;
		camif_lite_node->bottom_half_handler = NULL;

		camif_lite_node->res_priv = NULL;

		if (!camif_lite_priv) {
		CAM_ERR(CAM_ISP, "Error. camif_priv is NULL");
		return -ENODEV;
		}

		kfree(camif_lite_priv);

		return 0;
		}