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Commit 97d9e664 authored by Will McVicker's avatar Will McVicker Committed by Daniel Jacob Chittoor
Browse files

GKI: ARM: dts: msm: disable coresight for bengal/kona/lito 



Coresight is used for debugging purposes. When the debugging configs are
disabled, having these included causes power regressions due to clks
being left on. So lets disable all the coresight DT entries by default.

Signed-off-by: default avatarWill McVicker <willmcvicker@google.com>
Bug: 156429236
Test: compile, verify list of probed devices
Change-Id: I84f9c874f2f5e8720ced23c7b4268d1b536b96a7
parent 2adf61c5

arch/arm64/boot/dts/vendor/qcom/bengal.dtsi

+8 −1
Original line number Diff line number Diff line
@@ -474,6 +474,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU0>;

		status = "disabled";

	};



	jtag_mm1: jtagmm@9140000 {
@@ -485,6 +486,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU1>;

		status = "disabled";

	};



	jtag_mm2: jtagmm@9240000 {
@@ -496,6 +498,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU2>;

		status = "disabled";

	};



	jtag_mm3: jtagmm@9340000 {
@@ -507,6 +510,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU3>;

		status = "disabled";

	};



	jtag_mm4: jtagmm@9440000 {
@@ -518,6 +522,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU4>;

		status = "disabled";

	};



	jtag_mm5: jtagmm@9540000 {
@@ -529,6 +534,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU5>;

		status = "disabled";

	};



	jtag_mm6: jtagmm@9640000 {
@@ -540,6 +546,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU6>;

		status = "disabled";

	};



	jtag_mm7: jtagmm@9740000 {
@@ -551,6 +558,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU7>;

		status = "disabled";

	};



	qcom,memshare {
@@ -2644,7 +2652,6 @@ 
#include "bengal-gdsc.dtsi"

#include "bengal-usb.dtsi"

#include "bengal-ion.dtsi"

#include "bengal-coresight.dtsi"

#include "bengal-bus.dtsi"

#include "bengal-vidc.dtsi"

#include "pm6125.dtsi"

arch/arm64/boot/dts/vendor/qcom/kona.dtsi

+8 −1
Original line number Diff line number Diff line
@@ -773,6 +773,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU0>;

		status = "disabled";

	};



	jtag_mm1: jtagmm@7140000 {
@@ -784,6 +785,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU1>;

		status = "disabled";

	};



	jtag_mm2: jtagmm@7240000 {
@@ -795,6 +797,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU2>;

		status = "disabled";

	};



	jtag_mm3: jtagmm@7340000 {
@@ -806,6 +809,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU3>;

		status = "disabled";

	};



	jtag_mm4: jtagmm@7440000 {
@@ -817,6 +821,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU4>;

		status = "disabled";

	};



	jtag_mm5: jtagmm@7540000 {
@@ -828,6 +833,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU5>;

		status = "disabled";

	};



	jtag_mm6: jtagmm@7640000 {
@@ -839,6 +845,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU6>;

		status = "disabled";

	};



	jtag_mm7: jtagmm@7740000 {
@@ -850,6 +857,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU7>;

		status = "disabled";

	};



	qcom,devfreq-l3 {
@@ -5039,7 +5047,6 @@ 
#include "kona-pinctrl.dtsi"

#include "kona-smp2p.dtsi"

#include "kona-usb.dtsi"

#include "kona-coresight.dtsi"

#include "kona-sde.dtsi"

#include "kona-sde-pll.dtsi"

#include "msm-rdbg.dtsi"

arch/arm64/boot/dts/vendor/qcom/lito.dtsi

+8 −1
Original line number Diff line number Diff line
@@ -1419,6 +1419,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU0>;

		status = "disabled";

	};



	jtag_mm1: jtagmm@7140000 {
@@ -1430,6 +1431,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU1>;

		status = "disabled";

	};



	jtag_mm2: jtagmm@7240000 {
@@ -1441,6 +1443,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU2>;

		status = "disabled";

	};



	jtag_mm3: jtagmm@7340000 {
@@ -1452,6 +1455,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU3>;

		status = "disabled";

	};



	jtag_mm4: jtagmm@7440000 {
@@ -1463,6 +1467,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU4>;

		status = "disabled";

	};



	jtag_mm5: jtagmm@7540000 {
@@ -1474,6 +1479,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU5>;

		status = "disabled";

	};



	jtag_mm6: jtagmm@7640000 {
@@ -1485,6 +1491,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU6>;

		status = "disabled";

	};



	jtag_mm7: jtagmm@7740000 {
@@ -1496,6 +1503,7 @@ 
		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU7>;

		status = "disabled";

	};



	keepalive_opp_table: keepalive-opp-table {
@@ -3870,7 +3878,6 @@ 
};



#include "lito-qupv3.dtsi"

#include "lito-coresight.dtsi"

#include "camera/lito-camera.dtsi"

#include "lito-audio.dtsi"