Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 97c65b5f authored by Shravan Nevatia's avatar Shravan Nevatia
Browse files

msm: camera: csiphy: Update reset sequence for csiphy v1.2 



Add a transition of 1 to 0 in the PHY reset register
during the PHY reset sequence to fix UNBOUNDED_FRAME
errors for CPHY sensor.

CRs-Fixed: 2563019
Change-Id: I019e4cfdfa2042416e62b306dca0448d6a05c3b8
Signed-off-by: default avatarShravan Nevatia <snevatia@codeaurora.org>
parent 8acdfccd

drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_hwreg.h

+2 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ struct csiphy_reg_parms_t csiphy_v1_2 = { 
	.mipi_csiphy_interrupt_clear0_addr = 0x858,

	.mipi_csiphy_glbl_irq_cmd_addr = 0x828,

	.csiphy_common_array_size = 6,

	.csiphy_reset_array_size = 4,

	.csiphy_reset_array_size = 5,

	.csiphy_2ph_config_array_size = 18,

	.csiphy_3ph_config_array_size = 33,

	.csiphy_2ph_clock_lane = 0x1,
@@ -33,6 +33,7 @@ struct csiphy_reg_t csiphy_reset_reg_1_2[] = { 
	{0x0814, 0x00, 0x05, CSIPHY_LANE_ENABLE},

	{0x0818, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},

	{0x081C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},

	{0x0800, 0x01, 0x01, CSIPHY_DEFAULT_PARAMS},

	{0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},

};