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Commit 973bbae0 authored by Charan Teja Reddy's avatar Charan Teja Reddy Committed by Gerrit - the friendly Code Review server
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iommu: arm-smmu: add debug info about inprogress sync and invalidation 



Add additional debug info that tells about inprogress sync and
invalidation of TCU which helps in debugging TLB sync timeout issues.

Change-Id: If38ceb64ad2bbb6b3a9b858334ea306f56bad8e6
Signed-off-by: default avatarCharan Teja Reddy <charante@codeaurora.org>
parent 5cb0a4bd

drivers/iommu/arm-smmu-regs.h

+1 −0
Original line number Diff line number Diff line
@@ -193,6 +193,7 @@ enum arm_smmu_s2cr_privcfg { 
#define ARM_SMMU_CB_ATSR		0x8f0

#define ARM_SMMU_STATS_SYNC_INV_TBU_ACK 0x25dc

#define ARM_SMMU_TBU_PWR_STATUS         0x2204

#define ARM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR 0x2670



#define SCTLR_MEM_ATTR_SHIFT		16

#define SCTLR_SHCFG_SHIFT		22

drivers/iommu/arm-smmu.c

+5 −3
Original line number Diff line number Diff line
@@ -1100,7 +1100,7 @@ static int __arm_smmu_tlb_sync(struct arm_smmu_device *smmu, 
				void __iomem *sync, void __iomem *status)

{

	unsigned int spin_cnt, delay;

	u32 sync_inv_ack, tbu_pwr_status;

	u32 sync_inv_ack, tbu_pwr_status, sync_inv_progress;



	writel_relaxed(0, sync);

	for (delay = 1; delay < TLB_LOOP_TIMEOUT; delay *= 2) {
@@ -1115,10 +1115,12 @@ static int __arm_smmu_tlb_sync(struct arm_smmu_device *smmu, 
				     ARM_SMMU_STATS_SYNC_INV_TBU_ACK));

	tbu_pwr_status = scm_io_read((unsigned long)(smmu->phys_addr +

				     ARM_SMMU_TBU_PWR_STATUS));

	sync_inv_progress = scm_io_read((unsigned long)(smmu->phys_addr +

					ARM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR));

	trace_tlbsync_timeout(smmu->dev, 0);

	dev_err_ratelimited(smmu->dev,

			    "TLB sync timed out -- SMMU may be deadlocked ack 0x%x pwr 0x%x\n",

			    sync_inv_ack, tbu_pwr_status);

			    "TLB sync timed out -- SMMU may be deadlocked ack 0x%x pwr 0x%x sync and invalidation progress 0x%x\n",

			    sync_inv_ack, tbu_pwr_status, sync_inv_progress);

	BUG_ON(IS_ENABLED(CONFIG_IOMMU_TLBSYNC_DEBUG));

	return -EINVAL;

}