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Commit 9705ad8a authored by Jeff McGee's avatar Jeff McGee Committed by Daniel Vetter
Browse files

drm/i915: Split SSEU init into functions by platform 



Signed-off-by: default avatarJeff McGee <jeff.mcgee@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 3449ca85

drivers/gpu/drm/i915/i915_dma.c

+125 −109
Original line number Diff line number Diff line
@@ -564,69 +564,13 @@ static void i915_dump_device_info(struct drm_i915_private *dev_priv) 
#undef SEP_COMMA

}



/*

 * Determine various intel_device_info fields at runtime.

 *

 * Use it when either:

 *   - it's judged too laborious to fill n static structures with the limit

 *     when a simple if statement does the job,

 *   - run-time checks (eg read fuse/strap registers) are needed.

 *

 * This function needs to be called:

 *   - after the MMIO has been setup as we are reading registers,

 *   - after the PCH has been detected,

 *   - before the first usage of the fields it can tweak.

 */

static void intel_device_info_runtime_init(struct drm_device *dev)

static void cherryview_sseu_info_init(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_device_info *info;

	enum pipe pipe;



	info = (struct intel_device_info *)&dev_priv->info;



	if (IS_BROXTON(dev)) {

		info->num_sprites[PIPE_A] = 3;

		info->num_sprites[PIPE_B] = 3;

		info->num_sprites[PIPE_C] = 2;

	} else if (IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen == 9)

		for_each_pipe(dev_priv, pipe)

			info->num_sprites[pipe] = 2;

	else

		for_each_pipe(dev_priv, pipe)

			info->num_sprites[pipe] = 1;



	if (i915.disable_display) {

		DRM_INFO("Display disabled (module parameter)\n");

		info->num_pipes = 0;

	} else if (info->num_pipes > 0 &&

		   (INTEL_INFO(dev)->gen == 7 || INTEL_INFO(dev)->gen == 8) &&

		   !IS_VALLEYVIEW(dev)) {

		u32 fuse_strap = I915_READ(FUSE_STRAP);

		u32 sfuse_strap = I915_READ(SFUSE_STRAP);



		/*

		 * SFUSE_STRAP is supposed to have a bit signalling the display

		 * is fused off. Unfortunately it seems that, at least in

		 * certain cases, fused off display means that PCH display

		 * reads don't land anywhere. In that case, we read 0s.

		 *

		 * On CPT/PPT, we can detect this case as SFUSE_STRAP_FUSE_LOCK

		 * should be set when taking over after the firmware.

		 */

		if (fuse_strap & ILK_INTERNAL_DISPLAY_DISABLE ||

		    sfuse_strap & SFUSE_STRAP_DISPLAY_DISABLED ||

		    (dev_priv->pch_type == PCH_CPT &&

		     !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {

			DRM_INFO("Display fused off, disabling\n");

			info->num_pipes = 0;

		}

	}



	/* Initialize slice/subslice/EU info */

	if (IS_CHERRYVIEW(dev)) {

	u32 fuse, eu_dis;



	info = (struct intel_device_info *)&dev_priv->info;

	fuse = I915_READ(CHV_FUSE_GT);



	info->slice_total = 1;
@@ -661,11 +605,17 @@ static void intel_device_info_runtime_init(struct drm_device *dev) 
	info->has_slice_pg = 0;

	info->has_subslice_pg = (info->subslice_total > 1);

	info->has_eu_pg = (info->eu_per_subslice > 2);

	} else if (IS_SKYLAKE(dev)) {

}



static void gen9_sseu_info_init(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_device_info *info;

	const int s_max = 3, ss_max = 4, eu_max = 8;

	int s, ss;

	u32 fuse2, eu_disable[s_max], s_enable, ss_disable;



	info = (struct intel_device_info *)&dev_priv->info;

	fuse2 = I915_READ(GEN8_FUSE2);

	s_enable = (fuse2 & GEN8_F2_S_ENA_MASK) >>

		   GEN8_F2_S_ENA_SHIFT;
@@ -734,6 +684,72 @@ static void intel_device_info_runtime_init(struct drm_device *dev) 
	info->has_subslice_pg = 0;

	info->has_eu_pg = (info->eu_per_subslice > 2) ? 1 : 0;

}



/*

 * Determine various intel_device_info fields at runtime.

 *

 * Use it when either:

 *   - it's judged too laborious to fill n static structures with the limit

 *     when a simple if statement does the job,

 *   - run-time checks (eg read fuse/strap registers) are needed.

 *

 * This function needs to be called:

 *   - after the MMIO has been setup as we are reading registers,

 *   - after the PCH has been detected,

 *   - before the first usage of the fields it can tweak.

 */

static void intel_device_info_runtime_init(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_device_info *info;

	enum pipe pipe;



	info = (struct intel_device_info *)&dev_priv->info;



	if (IS_BROXTON(dev)) {

		info->num_sprites[PIPE_A] = 3;

		info->num_sprites[PIPE_B] = 3;

		info->num_sprites[PIPE_C] = 2;

	} else if (IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen == 9)

		for_each_pipe(dev_priv, pipe)

			info->num_sprites[pipe] = 2;

	else

		for_each_pipe(dev_priv, pipe)

			info->num_sprites[pipe] = 1;



	if (i915.disable_display) {

		DRM_INFO("Display disabled (module parameter)\n");

		info->num_pipes = 0;

	} else if (info->num_pipes > 0 &&

		   (INTEL_INFO(dev)->gen == 7 || INTEL_INFO(dev)->gen == 8) &&

		   !IS_VALLEYVIEW(dev)) {

		u32 fuse_strap = I915_READ(FUSE_STRAP);

		u32 sfuse_strap = I915_READ(SFUSE_STRAP);



		/*

		 * SFUSE_STRAP is supposed to have a bit signalling the display

		 * is fused off. Unfortunately it seems that, at least in

		 * certain cases, fused off display means that PCH display

		 * reads don't land anywhere. In that case, we read 0s.

		 *

		 * On CPT/PPT, we can detect this case as SFUSE_STRAP_FUSE_LOCK

		 * should be set when taking over after the firmware.

		 */

		if (fuse_strap & ILK_INTERNAL_DISPLAY_DISABLE ||

		    sfuse_strap & SFUSE_STRAP_DISPLAY_DISABLED ||

		    (dev_priv->pch_type == PCH_CPT &&

		     !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {

			DRM_INFO("Display fused off, disabling\n");

			info->num_pipes = 0;

		}

	}



	/* Initialize slice/subslice/EU info */

	if (IS_CHERRYVIEW(dev))

		cherryview_sseu_info_init(dev);

	else if (IS_SKYLAKE(dev))

		gen9_sseu_info_init(dev);



	DRM_DEBUG_DRIVER("slice total: %u\n", info->slice_total);

	DRM_DEBUG_DRIVER("subslice total: %u\n", info->subslice_total);

	DRM_DEBUG_DRIVER("subslice per slice: %u\n", info->subslice_per_slice);