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Commit 96ffbbf9 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2017-11-01' of... 

Merge tag 'drm-intel-fixes-2017-11-01' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes

Fixes for Stable:

- Fix KBL Blank Screen (Jani)
- Fix FIFO Underrun on SNB (Maarten)

Other fixes:

- Fix GPU Hang on i915gm (Chris)
- Fix gem_tiled_pread_pwrite IGT case (Chris)
- Cancel modeset retry work during modeset clean-up (Manasi)

* tag 'drm-intel-fixes-2017-11-01' of git://anongit.freedesktop.org/drm/drm-intel:
  drm/i915: Check incoming alignment for unfenced buffers (on i915gm)
  drm/i915: Hold rcu_read_lock when iterating over the radixtree (vma idr)
  drm/i915: Hold rcu_read_lock when iterating over the radixtree (objects)
  drm/i915/edp: read edp display control registers unconditionally
  drm/i915: Do not rely on wm preservation for ILK watermarks
  drm/i915: Cancel the modeset retry work during modeset cleanup
parents 25dd1aa3 bb5cf338

drivers/gpu/drm/i915/i915_gem.c

+2 −0
Original line number Diff line number Diff line
@@ -2214,8 +2214,10 @@ static void __i915_gem_object_reset_page_iter(struct drm_i915_gem_object *obj) 
	struct radix_tree_iter iter;

	void __rcu **slot;



	rcu_read_lock();

	radix_tree_for_each_slot(slot, &obj->mm.get_page.radix, &iter, 0)

		radix_tree_delete(&obj->mm.get_page.radix, iter.index);

	rcu_read_unlock();

}



void __i915_gem_object_put_pages(struct drm_i915_gem_object *obj,

drivers/gpu/drm/i915/i915_gem_context.c

+2 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ static void lut_close(struct i915_gem_context *ctx) 
		kmem_cache_free(ctx->i915->luts, lut);

	}



	rcu_read_lock();

	radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {

		struct i915_vma *vma = rcu_dereference_raw(*slot);

		struct drm_i915_gem_object *obj = vma->obj;
@@ -115,6 +116,7 @@ static void lut_close(struct i915_gem_context *ctx) 


		__i915_gem_object_release_unless_active(obj);

	}

	rcu_read_unlock();

}



static void i915_gem_context_free(struct i915_gem_context *ctx)

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+4 −0
Original line number Diff line number Diff line
@@ -337,6 +337,10 @@ eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, 
	    (vma->node.start + vma->node.size - 1) >> 32)

		return true;



	if (flags & __EXEC_OBJECT_NEEDS_MAP &&

	    !i915_vma_is_map_and_fenceable(vma))

		return true;



	return false;

}

drivers/gpu/drm/i915/intel_display.c

+18 −1
Original line number Diff line number Diff line
@@ -15227,6 +15227,23 @@ void intel_connector_unregister(struct drm_connector *connector) 
	intel_panel_destroy_backlight(connector);

}



static void intel_hpd_poll_fini(struct drm_device *dev)

{

	struct intel_connector *connector;

	struct drm_connector_list_iter conn_iter;



	/* First disable polling... */

	drm_kms_helper_poll_fini(dev);



	/* Then kill the work that may have been queued by hpd. */

	drm_connector_list_iter_begin(dev, &conn_iter);

	for_each_intel_connector_iter(connector, &conn_iter) {

		if (connector->modeset_retry_work.func)

			cancel_work_sync(&connector->modeset_retry_work);

	}

	drm_connector_list_iter_end(&conn_iter);

}



void intel_modeset_cleanup(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = to_i915(dev);
@@ -15247,7 +15264,7 @@ void intel_modeset_cleanup(struct drm_device *dev) 
	 * Due to the hpd irq storm handling the hotplug work can re-arm the

	 * poll handlers. Hence disable polling after hpd handling is shut down.

	 */

	drm_kms_helper_poll_fini(dev);

	intel_hpd_poll_fini(dev);



	/* poll work can call into fbdev, hence clean that up afterwards */

	intel_fbdev_fini(dev_priv);

drivers/gpu/drm/i915/intel_dp.c

+10 −3
Original line number Diff line number Diff line
@@ -3731,9 +3731,16 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) 


	}



	/* Read the eDP Display control capabilities registers */

	if ((intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_DPCD_DISPLAY_CONTROL_CAPABLE) &&

	    drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,

	/*

	 * Read the eDP display control registers.

	 *

	 * Do this independent of DP_DPCD_DISPLAY_CONTROL_CAPABLE bit in

	 * DP_EDP_CONFIGURATION_CAP, because some buggy displays do not have it

	 * set, but require eDP 1.4+ detection (e.g. for supported link rates

	 * method). The display control registers should read zero if they're

	 * not supported anyway.

	 */

	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,

			     intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) ==

			     sizeof(intel_dp->edp_dpcd))

		DRM_DEBUG_KMS("EDP DPCD : %*ph\n", (int) sizeof(intel_dp->edp_dpcd),