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Commit 96b95a55 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge changes I9a8d3c10,I278e7510,Iec1e6c67,I8ec7072b,I08b43771 into audio-drivers.lnx.4.0 

* changes:
  asoc: wsa883x: Fix SSR mute on speaker
  SoC: wsa883x: Remove from soundwire group during teardown
  ASoC: wsa883x: Disable interrupts during bootup
  ASoC: wsa883x: Update speaker playback sequence
  ASoC: wsa883x: WSA883x codec driver support.
parents b23b604b 9eac2519

asoc/codecs/wsa883x/internal.h

+18 −6
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.

 */



#ifndef WSA883X_INTERNAL_H

#define WSA883X_INTERNAL_H



#include <asoc/wcd-irq.h>

#include "wsa883x.h"

#include "wsa883x-registers.h"
@@ -25,7 +26,11 @@ 
#define WSA883X_DRV_NAME "wsa883x-codec"

#define WSA883X_NUM_RETRY	5



#define WSA883X_VERSION_ENTRY_SIZE 27

#define WSA883X_VERSION_ENTRY_SIZE 32

#define WSA883X_VARIANT_ENTRY_SIZE 32



#define WSA883X_VERSION_1_0 0

#define WSA883X_VERSION_1_1 1



enum {

	G_18DB = 0,
@@ -60,12 +65,13 @@ enum { 
	BOLERO_WSA_EVT_PA_OFF_PRE_SSR,

	BOLERO_WSA_EVT_SSR_DOWN,

	BOLERO_WSA_EVT_SSR_UP,

	BOLERO_WSA_EVT_PA_ON_POST_FSCLK,

};



struct wsa_ctrl_platform_data {

	void *handle,

	void *handle;

	int (*update_wsa_event)(void *handle, u16 event, u32 data);

	int (*register_notifier)(void *handle, struct notifer_block *nblock,

	int (*register_notifier)(void *handle, struct notifier_block *nblock,

				bool enable);

};
@@ -97,10 +103,13 @@ struct wsa883x_priv { 
	struct mutex res_lock;

	struct snd_info_entry *entry;

	struct snd_info_entry *version_entry;

	struct snd_info_entry *variant_entry;

	struct device_node *wsa_rst_np;

	int pa_mute;

	int curr_temp;

	int variant;

	int version;

	u8 pa_gain;

	struct irq_domain *virq;

	struct wcd_irq_info irq_info;

#ifdef CONFIG_DEBUG_FS
@@ -116,8 +125,11 @@ struct wsa883x_priv { 
	void *handle;

	int (*register_notifier)(void *handle,

				struct notifier_block *nblock, bool enable);

	struct delayed_work vbat_work;

	struct cdc_regulator *regulator;

	int num_supplies;

	struct regulator_bulk_data *supplies;

	unsigned long status_mask;

};



static int32_t wsa883x_resource_acquire(struct snd_soc_component *component,

						bool enable);

#endif /* WSA883X_INTERNAL_H */

asoc/codecs/wsa883x/wsa883x-registers.h

+36 −26
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/* Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015, 2019-2020, The Linux Foundation. All rights reserved.

 */



#ifndef WSA883X_REGISTERS_H
@@ -15,7 +15,7 @@ enum { 
	RD_WR_REG,

};



#define WSA883X_ANA_BG_TSADC_BASE       (WSA883X_BASE+0x00000000)

#define WSA883X_ANA_BG_TSADC_BASE       (WSA883X_BASE+0x00000001)

#define WSA883X_REF_CTRL                (WSA883X_ANA_BG_TSADC_BASE+0x0000)

#define WSA883X_TEST_CTL_0              (WSA883X_ANA_BG_TSADC_BASE+0x0001)

#define WSA883X_BIAS_0                  (WSA883X_ANA_BG_TSADC_BASE+0x0002)
@@ -69,8 +69,8 @@ enum { 
#define WSA883X_SPKR_DRV_LF_MASK_DCC_CTL (WSA883X_ANA_SPK_TOP_BASE+0x000F)

#define WSA883X_SPKR_DRV_LF_MISC_CTL    (WSA883X_ANA_SPK_TOP_BASE+0x0010)

#define WSA883X_SPKR_DRV_LF_REG_GAIN    (WSA883X_ANA_SPK_TOP_BASE+0x0011)

#define WSA883X_SPKR_DRV_LF_OS_CAL_CTL1 (WSA883X_ANA_SPK_TOP_BASE+0x0012)

#define WSA883X_SPKR_DRV_LF_OS_CAL_CTL  (WSA883X_ANA_SPK_TOP_BASE+0x0013)

#define WSA883X_SPKR_DRV_OS_CAL_CTL     (WSA883X_ANA_SPK_TOP_BASE+0x0012)

#define WSA883X_SPKR_DRV_OS_CAL_CTL1     (WSA883X_ANA_SPK_TOP_BASE+0x0013)

#define WSA883X_SPKR_PWM_CLK_CTL        (WSA883X_ANA_SPK_TOP_BASE+0x0014)

#define WSA883X_SPKR_PDRV_HS_CTL        (WSA883X_ANA_SPK_TOP_BASE+0x0015)

#define WSA883X_SPKR_PDRV_LS_CTL        (WSA883X_ANA_SPK_TOP_BASE+0x0016)
@@ -81,7 +81,7 @@ enum { 
#define WSA883X_PA_STATUS1              (WSA883X_ANA_SPK_TOP_BASE+0x001B)

#define WSA883X_PA_STATUS2              (WSA883X_ANA_SPK_TOP_BASE+0x001C)



#define WSA883X_ANA_BOOST_BASE          (WSA883X_BASE+0x00000045)

#define WSA883X_ANA_BOOST_BASE          (WSA883X_BASE+0x00000043)

#define WSA883X_EN_CTRL                 (WSA883X_ANA_BOOST_BASE+0x0000)

#define WSA883X_CURRENT_LIMIT           (WSA883X_ANA_BOOST_BASE+0x0001)

#define WSA883X_IBIAS1                  (WSA883X_ANA_BOOST_BASE+0x0002)
@@ -92,34 +92,35 @@ enum { 
#define WSA883X_STABILITY_CTRL2         (WSA883X_ANA_BOOST_BASE+0x0007)

#define WSA883X_PWRSTAGE_CTRL1          (WSA883X_ANA_BOOST_BASE+0x0008)

#define WSA883X_PWRSTAGE_CTRL2          (WSA883X_ANA_BOOST_BASE+0x0009)

#define WSA883X_UVLO                    (WSA883X_ANA_BOOST_BASE+0x000A)

#define WSA883X_SEQUENCE_CTRL           (WSA883X_ANA_BOOST_BASE+0x000B)

#define WSA883X_BYPASS_1                (WSA883X_ANA_BOOST_BASE+0x000A)

#define WSA883X_BYPASS_2                (WSA883X_ANA_BOOST_BASE+0x000B)

#define WSA883X_ZX_CTRL_1               (WSA883X_ANA_BOOST_BASE+0x000C)

#define WSA883X_ZX_CTRL_2               (WSA883X_ANA_BOOST_BASE+0x000D)

#define WSA883X_MISC1                   (WSA883X_ANA_BOOST_BASE+0x000E)

#define WSA883X_MISC2                   (WSA883X_ANA_BOOST_BASE+0x000F)

#define WSA883X_GMAMP_SUP1              (WSA883X_ANA_BOOST_BASE+0x0010)

#define WSA883X_PWRSTAGE_CTRL3          (WSA883X_ANA_BOOST_BASE+0x0011)

#define WSA883X_PRSTAGE_CTRL4           (WSA883X_ANA_BOOST_BASE+0x0012)

#define WSA883X_SPARE1                  (WSA883X_ANA_BOOST_BASE+0x0013)

#define WSA883X_PWRSTAGE_CTRL4          (WSA883X_ANA_BOOST_BASE+0x0012)

#define WSA883X_TEST1                   (WSA883X_ANA_BOOST_BASE+0x0013)

#define WSA883X_SPARE1                  (WSA883X_ANA_BOOST_BASE+0x0014)

#define WSA883X_SPARE2                  (WSA883X_ANA_BOOST_BASE+0x0015)



#define WSA883X_ANA_PON_LDOL_BASE       (WSA883X_BASE+0x00000059)

#define WSA883X_PON_CTL_0               (WSA883X_ANA_PON_LDOL_BASE+0x0000)

#define WSA883X_PON_CLT_1               (WSA883X_ANA_PON_LDOL_BASE+0x0001)

#define WSA883X_PON_CTL_2               (WSA883X_ANA_PON_LDOL_BASE+0x0002)

#define WSA883X_PON_CTL_3               (WSA883X_ANA_PON_LDOL_BASE+0x0003)

#define WSA883X_PON_CTL_4               (WSA883X_ANA_PON_LDOL_BASE+0x0004)

#define WSA883X_CKWD_CTL_0              (WSA883X_ANA_PON_LDOL_BASE+0x0005)

#define WSA883X_CKWD_CTL_1              (WSA883X_ANA_PON_LDOL_BASE+0x0006)

#define WSA883X_CKWD_CTL_2              (WSA883X_ANA_PON_LDOL_BASE+0x0007)

#define WSA883X_CKSK_CTL_0              (WSA883X_ANA_PON_LDOL_BASE+0x0008)

#define WSA883X_CKWD_CTL_0              (WSA883X_ANA_PON_LDOL_BASE+0x0004)

#define WSA883X_CKWD_CTL_1              (WSA883X_ANA_PON_LDOL_BASE+0x0005)

#define WSA883X_CKWD_CTL_2              (WSA883X_ANA_PON_LDOL_BASE+0x0006)

#define WSA883X_CKSK_CTL_0              (WSA883X_ANA_PON_LDOL_BASE+0x0007)

#define WSA883X_PADSW_CTL_0             (WSA883X_ANA_PON_LDOL_BASE+0x0008)

#define WSA883X_TEST_0                  (WSA883X_ANA_PON_LDOL_BASE+0x0009)

#define WSA883X_TEST_1                  (WSA883X_ANA_PON_LDOL_BASE+0x000A)

#define WSA883X_STATUS_0                (WSA883X_ANA_PON_LDOL_BASE+0x000B)

#define WSA883X_STATUS_1                (WSA883X_ANA_PON_LDOL_BASE+0x000C)



#define WSA883X_DIG_CTRL_BASE           (WSA883X_BASE+0x00000400)

#define WSA883X_PAGE_REGISTER           (WSA883X_DIG_CTRL_BASE+0x0000)

#define WSA883X_CHIP_ID0                (WSA883X_DIG_CTRL_BASE+0x0001)

#define WSA883X_CHIP_ID1                (WSA883X_DIG_CTRL_BASE+0x0002)

#define WSA883X_CHIP_ID2                (WSA883X_DIG_CTRL_BASE+0x0003)
@@ -130,6 +131,7 @@ enum { 
#define WSA883X_CDC_PATH_MODE           (WSA883X_DIG_CTRL_BASE+0x0008)

#define WSA883X_CDC_CLK_CTL             (WSA883X_DIG_CTRL_BASE+0x0009)

#define WSA883X_SWR_RESET_EN            (WSA883X_DIG_CTRL_BASE+0x000A)

#define WSA883X_RESET_CTL               (WSA883X_DIG_CTRL_BASE+0x000B)

#define WSA883X_PA_FSM_CTL              (WSA883X_DIG_CTRL_BASE+0x0010)

#define WSA883X_PA_FSM_TIMER0           (WSA883X_DIG_CTRL_BASE+0x0011)

#define WSA883X_PA_FSM_TIMER1           (WSA883X_DIG_CTRL_BASE+0x0012)
@@ -137,6 +139,7 @@ enum { 
#define WSA883X_PA_FSM_ERR_COND         (WSA883X_DIG_CTRL_BASE+0x0014)

#define WSA883X_PA_FSM_MSK              (WSA883X_DIG_CTRL_BASE+0x0015)

#define WSA883X_PA_FSM_BYP              (WSA883X_DIG_CTRL_BASE+0x0016)

#define WSA883X_PA_FSM_DBG              (WSA883X_DIG_CTRL_BASE+0x0017)

#define WSA883X_TADC_VALUE_CTL          (WSA883X_DIG_CTRL_BASE+0x0020)

#define WSA883X_TEMP_DETECT_CTL         (WSA883X_DIG_CTRL_BASE+0x0021)

#define WSA883X_TEMP_MSB                (WSA883X_DIG_CTRL_BASE+0x0022)
@@ -208,8 +211,10 @@ enum { 
#define WSA883X_WAVG_PER_2_3            (WSA883X_DIG_CTRL_BASE+0x0068)

#define WSA883X_WAVG_PER_4_5            (WSA883X_DIG_CTRL_BASE+0x0069)

#define WSA883X_WAVG_PER_6_7            (WSA883X_DIG_CTRL_BASE+0x006A)

#define WSA883X_WAVG_STA                (WSA883X_DIG_CTRL_BASE+0x006B)

#define WSA883X_DRE_CTL_0               (WSA883X_DIG_CTRL_BASE+0x006C)

#define WSA883X_DRE_CTL_1               (WSA883X_DIG_CTRL_BASE+0x006D)

#define WSA883X_DRE_IDLE_DET_CTL        (WSA883X_DIG_CTRL_BASE+0x006E)

#define WSA883X_CLSH_CTL_0              (WSA883X_DIG_CTRL_BASE+0x0070)

#define WSA883X_CLSH_CTL_1              (WSA883X_DIG_CTRL_BASE+0x0071)

#define WSA883X_CLSH_V_HD_PA            (WSA883X_DIG_CTRL_BASE+0x0072)
@@ -249,26 +254,28 @@ enum { 
#define WSA883X_I2C_SLAVE_CTL           (WSA883X_DIG_CTRL_BASE+0x0097)

#define WSA883X_PDM_TEST_MODE           (WSA883X_DIG_CTRL_BASE+0x00A0)

#define WSA883X_ATE_TEST_MODE           (WSA883X_DIG_CTRL_BASE+0x00A1)

#define WSA883X_DRE_TEST                (WSA883X_DIG_CTRL_BASE+0x00A2)

#define WSA883X_DIG_DEBUG_MODE          (WSA883X_DIG_CTRL_BASE+0x00A3)

#define WSA883X_DIG_DEBUG_SEL           (WSA883X_DIG_CTRL_BASE+0x00A4)

#define WSA883X_DIG_DEBUG_EN            (WSA883X_DIG_CTRL_BASE+0x00A5)

#define WSA883X_SWR_HM_TEST0            (WSA883X_DIG_CTRL_BASE+0x00A6)

#define WSA883X_SWR_HM_TEST1            (WSA883X_DIG_CTRL_BASE+0x00A7)

#define WSA883X_SWR_PAD_CTL             (WSA883X_DIG_CTRL_BASE+0x00A8)

#define WSA883X_TEMP_DETECT_DBG_CTL     (WSA883X_DIG_CTRL_BASE+0x00A9)

#define WSA883X_TEMP_DEBUG_MSB          (WSA883X_DIG_CTRL_BASE+0x00AA)

#define WSA883X_TEMP_DEBUG_LSB          (WSA883X_DIG_CTRL_BASE+0x00AB)

#define WSA883X_TADC_DETECT_DBG_CTL     (WSA883X_DIG_CTRL_BASE+0x00A9)

#define WSA883X_TADC_DEBUG_MSB          (WSA883X_DIG_CTRL_BASE+0x00AA)

#define WSA883X_TADC_DEBUG_LSB          (WSA883X_DIG_CTRL_BASE+0x00AB)

#define WSA883X_SAMPLE_EDGE_SEL         (WSA883X_DIG_CTRL_BASE+0x00AC)

#define WSA883X_TEST_MODE_CTL           (WSA883X_DIG_CTRL_BASE+0x00AD)

#define WSA883X_IOPAD_CTL               (WSA883X_DIG_CTRL_BASE+0x00AE)

#define WSA883X_SPARE_0                 (WSA883X_DIG_CTRL_BASE+0x00B0)

#define WSA883X_SPARE_1                 (WSA883X_DIG_CTRL_BASE+0x00B1)

#define WSA883X_SPARE_2                 (WSA883X_DIG_CTRL_BASE+0x00B2)

#define WSA883X_SWR_EDGE_SEL            (WSA883X_DIG_CTRL_BASE+0x00AD)

#define WSA883X_TEST_MODE_CTL           (WSA883X_DIG_CTRL_BASE+0x00AE)

#define WSA883X_IOPAD_CTL               (WSA883X_DIG_CTRL_BASE+0x00AF)

#define WSA883X_ANA_CSR_DBG_ADD         (WSA883X_DIG_CTRL_BASE+0x00B0)

#define WSA883X_ANA_CSR_DBG_CTL         (WSA883X_DIG_CTRL_BASE+0x00B1)

#define WSA883X_SPARE_R                 (WSA883X_DIG_CTRL_BASE+0x00BC)

#define WSA883X_SPARE_0                 (WSA883X_DIG_CTRL_BASE+0x00BD)

#define WSA883X_SPARE_1                 (WSA883X_DIG_CTRL_BASE+0x00BE)

#define WSA883X_SPARE_2                 (WSA883X_DIG_CTRL_BASE+0x00BF)

#define WSA883X_SCODE                   (WSA883X_DIG_CTRL_BASE+0x00C0)



#define WSA883X_DIG_TRIM_BASE           (WSA883X_BASE+0x00000500)

#define WSA883X_PAGE_REGISTER           (WSA883X_DIG_TRIM_BASE+0x0000)

#define WSA883X_OTP_REG_0               (WSA883X_DIG_TRIM_BASE+0x0080)

#define WSA883X_OTP_REG_1               (WSA883X_DIG_TRIM_BASE+0x0081)

#define WSA883X_OTP_REG_2               (WSA883X_DIG_TRIM_BASE+0x0082)
@@ -301,7 +308,10 @@ enum { 
#define WSA883X_OTP_REG_29              (WSA883X_DIG_TRIM_BASE+0x009D)

#define WSA883X_OTP_REG_30              (WSA883X_DIG_TRIM_BASE+0x009E)

#define WSA883X_OTP_REG_31              (WSA883X_DIG_TRIM_BASE+0x009F)

#define WSA883X_OTP_REG_SCODE           (WSA883X_DIG_TRIM_BASE+0x00A0)

#define WSA883X_OTP_REG_32              (WSA883X_DIG_TRIM_BASE+0x00A0)

#define WSA883X_OTP_REG_33              (WSA883X_DIG_TRIM_BASE+0x00A1)

#define WSA883X_OTP_REG_34              (WSA883X_DIG_TRIM_BASE+0x00A2)

#define WSA883X_OTP_REG_35              (WSA883X_DIG_TRIM_BASE+0x00A3)

#define WSA883X_OTP_REG_63              (WSA883X_DIG_TRIM_BASE+0x00BF)



#define WSA883X_DIG_EMEM_BASE           (WSA883X_BASE+0x000005C0)

asoc/codecs/wsa883x/wsa883x-regmap.c

+86 −76
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2015-2016, 2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015-2016, 2019-2020, The Linux Foundation. All rights reserved.

 */



#include <linux/regmap.h>
@@ -11,100 +11,101 @@ 
extern const u8 wsa883x_reg_access[WSA883X_NUM_REGISTERS];



static struct reg_default wsa883x_defaults[] = {

	{WSA883X_REF_CTRL,                   0x6C},

	{WSA883X_REF_CTRL,                   0xD5},

	{WSA883X_TEST_CTL_0,                 0x06},

	{WSA883X_BIAS_0,                     0xD2},

	{WSA883X_OP_CTL,                     0xE0},

	{WSA883X_IREF_CTL,                   0x58},

	{WSA883X_IREF_CTL,                   0x57},

	{WSA883X_ISENS_CTL,                  0x47},

	{WSA883X_CLK_CTL,                    0x87},

	{WSA883X_TEST_CTL_1,                 0x00},

	{WSA883X_BIAS_1,                     0x51},

	{WSA883X_ADC_CTL,                    0x03},

	{WSA883X_ADC_CTL,                    0x01},

	{WSA883X_DOUT_MSB,                   0x00},

	{WSA883X_DOUT_LSB,                   0x00},

	{WSA883X_VBAT_SNS,                   0x00},

	{WSA883X_ITRIM_CODE,                 0x1F},

	{WSA883X_EN,                         0x00},

	{WSA883X_VBAT_SNS,                   0x40},

	{WSA883X_ITRIM_CODE,                 0x9F},

	{WSA883X_EN,                         0x20},

	{WSA883X_OVERRIDE1,                  0x00},

	{WSA883X_OVERRIDE2,                  0x08},

	{WSA883X_VSENSE1,                    0xD3},

	{WSA883X_ISENSE1,                    0xD4},

	{WSA883X_ISENSE2,                    0x20},

	{WSA883X_ISENSE_CAL,                 0x00},

	{WSA883X_MISC,                       0x00},

	{WSA883X_MISC,                       0x08},

	{WSA883X_ADC_0,                      0x00},

	{WSA883X_ADC_1,                      0x00},

	{WSA883X_ADC_2,                      0x00},

	{WSA883X_ADC_3,                      0x00},

	{WSA883X_ADC_4,                      0x45},

	{WSA883X_ADC_5,                      0x20},

	{WSA883X_ADC_6,                      0x10},

	{WSA883X_ADC_7,                      0x00},

	{WSA883X_ADC_2,                      0x40},

	{WSA883X_ADC_3,                      0x80},

	{WSA883X_ADC_4,                      0x25},

	{WSA883X_ADC_5,                      0x25},

	{WSA883X_ADC_6,                      0x08},

	{WSA883X_ADC_7,                      0x81},

	{WSA883X_STATUS,                     0x00},

	{WSA883X_DAC_CTRL_REG,               0x41},

	{WSA883X_DAC_CTRL_REG,               0x53},

	{WSA883X_DAC_EN_DEBUG_REG,           0x00},

	{WSA883X_DAC_OPAMP_BIAS1_REG,        0x48},

	{WSA883X_DAC_OPAMP_BIAS2_REG,        0x48},

	{WSA883X_DAC_VCM_CTRL_REG,           0x0B},

	{WSA883X_DAC_VOLTAGE_CTRL_REG,       0x05},

	{WSA883X_DAC_VCM_CTRL_REG,           0x88},

	{WSA883X_DAC_VOLTAGE_CTRL_REG,       0xA5},

	{WSA883X_ATEST1_REG,                 0x00},

	{WSA883X_ATEST2_REG,                 0x00},

	{WSA883X_SPKR_TOP_BIAS_REG1,         0x4A},

	{WSA883X_SPKR_TOP_BIAS_REG1,         0x6A},

	{WSA883X_SPKR_TOP_BIAS_REG2,         0x65},

	{WSA883X_SPKR_TOP_BIAS_REG3,         0x55},

	{WSA883X_SPKR_TOP_BIAS_REG4,         0xA9},

	{WSA883X_SPKR_CLIP_DET_REG,          0x00},

	{WSA883X_SPKR_CLIP_DET_REG,          0x9C},

	{WSA883X_SPKR_DRV_LF_BLK_EN,         0x0F},

	{WSA883X_SPKR_DRV_LF_EN,             0x0A},

	{WSA883X_SPKR_DRV_LF_MASK_DCC_CTL,   0x00},

	{WSA883X_SPKR_DRV_LF_MISC_CTL,       0x32},

	{WSA883X_SPKR_DRV_LF_MISC_CTL,       0x3A},

	{WSA883X_SPKR_DRV_LF_REG_GAIN,       0x00},

	{WSA883X_SPKR_DRV_LF_OS_CAL_CTL1,    0x90},

	{WSA883X_SPKR_DRV_LF_OS_CAL_CTL,     0x00},

	{WSA883X_SPKR_DRV_OS_CAL_CTL,        0x00},

	{WSA883X_SPKR_DRV_OS_CAL_CTL1,       0x90},

	{WSA883X_SPKR_PWM_CLK_CTL,           0x00},

	{WSA883X_SPKR_PDRV_HS_CTL,           0x50},

	{WSA883X_SPKR_PDRV_HS_CTL,           0x52},

	{WSA883X_SPKR_PDRV_LS_CTL,           0x48},

	{WSA883X_SPKR_PWRSTG_DBG,            0x00},

	{WSA883X_SPKR_OCP_CTL,               0x00},

	{WSA883X_SPKR_BBM_CTL,               0x90},

	{WSA883X_SPKR_PWRSTG_DBG,            0x08},

	{WSA883X_SPKR_OCP_CTL,               0xE2},

	{WSA883X_SPKR_BBM_CTL,               0x92},

	{WSA883X_PA_STATUS0,                 0x00},

	{WSA883X_PA_STATUS1,                 0x00},

	{WSA883X_PA_STATUS2,                 0x00},

	{WSA883X_EN_CTRL,                    0x54},

	{WSA883X_CURRENT_LIMIT,              0x90},

	{WSA883X_PA_STATUS2,                 0x80},

	{WSA883X_EN_CTRL,                    0x44},

	{WSA883X_CURRENT_LIMIT,              0xCC},

	{WSA883X_IBIAS1,                     0x00},

	{WSA883X_IBIAS2,                     0x00},

	{WSA883X_IBIAS3,                     0x00},

	{WSA883X_LDO_PROG,                   0x2A},

	{WSA883X_LDO_PROG,                   0x02},

	{WSA883X_STABILITY_CTRL1,            0x8E},

	{WSA883X_STABILITY_CTRL2,            0x00},

	{WSA883X_PWRSTAGE_CTRL1,             0x00},

	{WSA883X_PWRSTAGE_CTRL2,             0x40},

	{WSA883X_UVLO,                       0xE9},

	{WSA883X_SEQUENCE_CTRL,              0x11},

	{WSA883X_STABILITY_CTRL2,            0x10},

	{WSA883X_PWRSTAGE_CTRL1,             0x06},

	{WSA883X_PWRSTAGE_CTRL2,             0x00},

	{WSA883X_BYPASS_1,                   0x19},

	{WSA883X_BYPASS_2,                   0x13},

	{WSA883X_ZX_CTRL_1,                  0xF0},

	{WSA883X_ZX_CTRL_2,                  0x06},

	{WSA883X_MISC1,                      0x02},

	{WSA883X_MISC2,                      0x81},

	{WSA883X_GMAMP_SUP1,                 0x84},

	{WSA883X_PWRSTAGE_CTRL3,             0x14},

	{WSA883X_PRSTAGE_CTRL4,              0x5F},

	{WSA883X_ZX_CTRL_2,                  0x04},

	{WSA883X_MISC1,                      0x06},

	{WSA883X_MISC2,                      0xA0},

	{WSA883X_GMAMP_SUP1,                 0x82},

	{WSA883X_PWRSTAGE_CTRL3,             0x39},

	{WSA883X_PWRSTAGE_CTRL4,             0x5F},

	{WSA883X_TEST1,                      0x00},

	{WSA883X_SPARE1,                     0x00},

	{WSA883X_PON_CTL_0,                  0xE3},

	{WSA883X_PON_CLT_1,                  0x70},

	{WSA883X_PON_CTL_2,                  0x00},

	{WSA883X_PON_CTL_3,                  0x00},

	{WSA883X_PON_CTL_4,                  0x00},

	{WSA883X_SPARE2,                     0x00},

	{WSA883X_PON_CTL_0,                  0x10},

	{WSA883X_PON_CLT_1,                  0xE0},

	{WSA883X_PON_CTL_2,                  0x90},

	{WSA883X_PON_CTL_3,                  0x70},

	{WSA883X_CKWD_CTL_0,                 0x34},

	{WSA883X_CKWD_CTL_1,                 0x80},

	{WSA883X_CKWD_CTL_1,                 0x0F},

	{WSA883X_CKWD_CTL_2,                 0x00},

	{WSA883X_CKSK_CTL_0,                 0x0A},

	{WSA883X_CKSK_CTL_0,                 0x00},

	{WSA883X_PADSW_CTL_0,                0x00},

	{WSA883X_TEST_0,                     0x00},

	{WSA883X_TEST_1,                     0x00},

	{WSA883X_STATUS_0,                   0x00},

	{WSA883X_STATUS_1,                   0x00},

	{WSA883X_PAGE_REGISTER,              0x00},

	{WSA883X_CHIP_ID0,                   0x00},

	{WSA883X_CHIP_ID1,                   0x00},

	{WSA883X_CHIP_ID2,                   0x02},
@@ -115,13 +116,15 @@ static struct reg_default wsa883x_defaults[] = { 
	{WSA883X_CDC_PATH_MODE,              0x00},

	{WSA883X_CDC_CLK_CTL,                0xFF},

	{WSA883X_SWR_RESET_EN,               0x00},

	{WSA883X_RESET_CTL,                  0x00},

	{WSA883X_PA_FSM_CTL,                 0x00},

	{WSA883X_PA_FSM_TIMER0,              0x80},

	{WSA883X_PA_FSM_TIMER1,              0x80},

	{WSA883X_PA_FSM_STA,                 0x00},

	{WSA883X_PA_FSM_ERR_COND,            0x00},

	{WSA883X_PA_FSM_MSK,                 0x00},

	{WSA883X_PA_FSM_BYP,                 0x00},

	{WSA883X_PA_FSM_BYP,                 0x01},

	{WSA883X_PA_FSM_DBG,                 0x00},

	{WSA883X_TADC_VALUE_CTL,             0x03},

	{WSA883X_TEMP_DETECT_CTL,            0x01},

	{WSA883X_TEMP_MSB,                   0x00},
@@ -193,15 +196,17 @@ static struct reg_default wsa883x_defaults[] = { 
	{WSA883X_WAVG_PER_2_3,               0x88},

	{WSA883X_WAVG_PER_4_5,               0x88},

	{WSA883X_WAVG_PER_6_7,               0x88},

	{WSA883X_DRE_CTL_0,                  0x30},

	{WSA883X_DRE_CTL_1,                  0x20},

	{WSA883X_WAVG_STA,                   0x00},

	{WSA883X_DRE_CTL_0,                  0x70},

	{WSA883X_DRE_CTL_1,                  0x08},

	{WSA883X_DRE_IDLE_DET_CTL,           0x1F},

	{WSA883X_CLSH_CTL_0,                 0x37},

	{WSA883X_CLSH_CTL_1,                 0x81},

	{WSA883X_CLSH_V_HD_PA,               0x0F},

	{WSA883X_CLSH_V_PA_MIN,              0x00},

	{WSA883X_CLSH_OVRD_VAL,              0x00},

	{WSA883X_CLSH_HARD_MAX,              0xFF},

	{WSA883X_CLSH_SOFT_MAX,              0xFF},

	{WSA883X_CLSH_SOFT_MAX,              0xF5},

	{WSA883X_CLSH_SIG_DP,                0x00},

	{WSA883X_TAGC_CTL,                   0x10},

	{WSA883X_TAGC_TIME,                  0x20},
@@ -212,18 +217,18 @@ static struct reg_default wsa883x_defaults[] = { 
	{WSA883X_VAGC_ATTN_LVL_1_2,          0x21},

	{WSA883X_VAGC_ATTN_LVL_3,            0x03},

	{WSA883X_INTR_MODE,                  0x00},

	{WSA883X_INTR_MASK0,                 0x1B},

	{WSA883X_INTR_MASK1,                 0x03},

	{WSA883X_INTR_MASK0,                 0x90},

	{WSA883X_INTR_MASK1,                 0x00},

	{WSA883X_INTR_STATUS0,               0x00},

	{WSA883X_INTR_STATUS1,               0x00},

	{WSA883X_INTR_CLEAR0,                0x00},

	{WSA883X_INTR_CLEAR1,                0x03},

	{WSA883X_INTR_CLEAR1,                0x00},

	{WSA883X_INTR_LEVEL0,                0x00},

	{WSA883X_INTR_LEVEL1,                0x03},

	{WSA883X_INTR_LEVEL1,                0x00},

	{WSA883X_INTR_SET0,                  0x00},

	{WSA883X_INTR_SET1,                  0x03},

	{WSA883X_INTR_SET1,                  0x00},

	{WSA883X_INTR_TEST0,                 0x00},

	{WSA883X_INTR_TEST1,                 0x03},

	{WSA883X_INTR_TEST1,                 0x00},

	{WSA883X_OTP_CTRL0,                  0x00},

	{WSA883X_OTP_CTRL1,                  0x00},

	{WSA883X_HDRIVE_CTL_GROUP1,          0x00},
@@ -234,25 +239,27 @@ static struct reg_default wsa883x_defaults[] = { 
	{WSA883X_I2C_SLAVE_CTL,              0x00},

	{WSA883X_PDM_TEST_MODE,              0x00},

	{WSA883X_ATE_TEST_MODE,              0x00},

	{WSA883X_DRE_TEST,                   0x00},

	{WSA883X_DIG_DEBUG_MODE,             0x00},

	{WSA883X_DIG_DEBUG_SEL,              0x00},

	{WSA883X_DIG_DEBUG_EN,               0x00},

	{WSA883X_SWR_HM_TEST0,               0x08},

	{WSA883X_SWR_HM_TEST1,               0x00},

	{WSA883X_SWR_PAD_CTL,                0x45},

	{WSA883X_TEMP_DETECT_DBG_CTL,        0x00},

	{WSA883X_TEMP_DEBUG_MSB,             0x00},

	{WSA883X_TEMP_DEBUG_LSB,             0x00},

	{WSA883X_SWR_PAD_CTL,                0x37},

	{WSA883X_TADC_DETECT_DBG_CTL,        0x00},

	{WSA883X_TADC_DEBUG_MSB,             0x00},

	{WSA883X_TADC_DEBUG_LSB,             0x00},

	{WSA883X_SAMPLE_EDGE_SEL,            0x7F},

	{WSA883X_TEST_MODE_CTL,              0x00},

	{WSA883X_SWR_EDGE_SEL,               0x00},

	{WSA883X_TEST_MODE_CTL,              0x04},

	{WSA883X_IOPAD_CTL,                  0x00},

	{WSA883X_ANA_CSR_DBG_ADD,            0x00},

	{WSA883X_ANA_CSR_DBG_CTL,            0x12},

	{WSA883X_SPARE_R,                    0x00},

	{WSA883X_SPARE_0,                    0x00},

	{WSA883X_SPARE_1,                    0x00},

	{WSA883X_SPARE_2,                    0x00},

	{WSA883X_SCODE,                      0x00},

	{WSA883X_PAGE_REGISTER,              0x00},

	{WSA883X_OTP_REG_0,                  0x01},

	{WSA883X_OTP_REG_0,                  0x05},

	{WSA883X_OTP_REG_1,                  0xFF},

	{WSA883X_OTP_REG_2,                  0xC0},

	{WSA883X_OTP_REG_3,                  0xFF},
@@ -276,15 +283,18 @@ static struct reg_default wsa883x_defaults[] = { 
	{WSA883X_OTP_REG_21,                 0xFF},

	{WSA883X_OTP_REG_22,                 0xFF},

	{WSA883X_OTP_REG_23,                 0xFF},

	{WSA883X_OTP_REG_24,                 0x03},

	{WSA883X_OTP_REG_25,                 0x01},

	{WSA883X_OTP_REG_24,                 0x37},

	{WSA883X_OTP_REG_25,                 0x3F},

	{WSA883X_OTP_REG_26,                 0x03},

	{WSA883X_OTP_REG_27,                 0x11},

	{WSA883X_OTP_REG_28,                 0x3F},

	{WSA883X_OTP_REG_29,                 0x3F},

	{WSA883X_OTP_REG_30,                 0x01},

	{WSA883X_OTP_REG_31,                 0x01},

	{WSA883X_OTP_REG_SCODE,              0x00},

	{WSA883X_OTP_REG_27,                 0x00},

	{WSA883X_OTP_REG_28,                 0x00},

	{WSA883X_OTP_REG_29,                 0x00},

	{WSA883X_OTP_REG_30,                 0x00},

	{WSA883X_OTP_REG_31,                 0x03},

	{WSA883X_OTP_REG_32,                 0x00},

	{WSA883X_OTP_REG_33,                 0xFF},

	{WSA883X_OTP_REG_34,                 0x00},

	{WSA883X_OTP_REG_35,                 0x00},

	{WSA883X_OTP_REG_63,                 0x40},

	{WSA883X_EMEM_0,                     0x00},

	{WSA883X_EMEM_1,                     0x00},
@@ -377,7 +387,7 @@ static bool wsa883x_volatile_register(struct device *dev, unsigned int reg) 
		!(wsa883x_reg_access[WSA883X_REG(reg)] & WR_REG));

}



struct regmap_config wsa881x_regmap_config = {

struct regmap_config wsa883x_regmap_config = {

	.reg_bits = 16,

	.val_bits = 8,

	.cache_type = REGCACHE_RBTREE,

asoc/codecs/wsa883x/wsa883x-tables.c

+27 −17

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asoc/codecs/wsa883x/wsa883x.c

+352 −39

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