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Commit 96676fe3 authored by Deepak S's avatar Deepak S Committed by Ville Syrjälä
Browse files

drm/i915/chv: Set min freq to RPn on CHV. 



With latest Punit FW, vgg input voltag drop falling to minimum is fixed.
So reverting the WA patch & moving to turbo freq opreation range to [RPn -> RP0]

This is not a 1:1 revert of the commit 5b7c91b7.
You can refer to commit 5b5929cb ("drm/i915/chv: remove
pre-production hardware workarounds") as the reason for the discrepancy

commit 5b7c91b7
Author: Deepak S <deepak.s@linux.intel.com>
Date:   Sat May 9 18:15:46 2015 +0530

    drm/i915/chv: Set min freq to efficient frequency on chv

v2: Fix inconsistent return type. (Chris)
v3: drop pre-production hw case (Ville)

Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDeepak S <deepak.s@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1471007801-86075-1-git-send-email-deepak.s@linux.intel.com


Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
parent 64d83e34

drivers/gpu/drm/i915/intel_pm.c

+12 −2
Original line number Diff line number Diff line
@@ -5708,6 +5708,17 @@ static int cherryview_rps_guar_freq(struct drm_i915_private *dev_priv) 
	return rp1;

}



static u32 cherryview_rps_min_freq(struct drm_i915_private *dev_priv)

{

	u32 val, rpn;



	val = vlv_punit_read(dev_priv, FB_GFX_FMIN_AT_VMIN_FUSE);

	rpn = ((val >> FB_GFX_FMIN_AT_VMIN_FUSE_SHIFT) &

		       FB_GFX_FREQ_FUSE_MASK);



	return rpn;

}



static int valleyview_rps_guar_freq(struct drm_i915_private *dev_priv)

{

	u32 val, rp1;
@@ -5944,8 +5955,7 @@ static void cherryview_init_gt_powersave(struct drm_i915_private *dev_priv) 
			 intel_gpu_freq(dev_priv, dev_priv->rps.rp1_freq),

			 dev_priv->rps.rp1_freq);



	/* PUnit validated range is only [RPe, RP0] */

	dev_priv->rps.min_freq = dev_priv->rps.efficient_freq;

	dev_priv->rps.min_freq = cherryview_rps_min_freq(dev_priv);

	DRM_DEBUG_DRIVER("min GPU freq: %d MHz (%u)\n",

			 intel_gpu_freq(dev_priv, dev_priv->rps.min_freq),

			 dev_priv->rps.min_freq);