Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 96263573 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'xtensa-next-20130225' of git://github.com/czankel/xtensa-linux

Pull xtensa update from Chris Zankel:
 "Added features:
   - add support for thread local storage (TLS)

   - add accept4 and finit_module syscalls

   - support medium-priority interrupts

   - add support for dc232c processor variant

   - support file-base simulated disk for ISS simulator

  Bug fixes:

   - fix return values returned by the str[n]cmp functions

   - avoid mmap cache aliasing

   - fix handling of 'windowed registers' in ptrace"

* tag 'xtensa-next-20130225' of git://github.com/czankel/xtensa-linux:
  xtensa: add accept4 syscall
  xtensa: add support for TLS
  xtensa: add missing include asm/uaccess.h to checksum.h
  xtensa: do not enable GENERIC_GPIO by default
  xtensa: complete ptrace handling of register windows
  xtensa: add support for oprofile
  xtensa: move spill_registers to traps.h
  xtensa: ISS: add host file-based simulated disk
  xtensa: fix str[n]cmp return value
  xtensa: avoid mmap cache aliasing
  xtensa: add finit_module syscall
  xtensa: pull signal definitions from signal-defs.h
  xtensa: fix ipc_parse_version selection
  xtensa: dispatch medium-priority interrupts
  xtensa: Add config files for Diamond 233L - Rev C processor variant
  xtensa: use new common dtc rule
  xtensa: rename prom_update_property to of_update_property
parents 2b37e9a2 9cf81c75
Loading
Loading
Loading
Loading
+45 −1
Original line number Diff line number Diff line
@@ -13,9 +13,11 @@ config XTENSA
	select GENERIC_CPU_DEVICES
	select MODULES_USE_ELF_RELA
	select GENERIC_PCI_IOMAP
	select ARCH_WANT_IPC_PARSE_VERSION
	select ARCH_WANT_OPTIONAL_GPIOLIB
	select CLONE_BACKWARDS
	select IRQ_DOMAIN
	select HAVE_OPROFILE
	help
	  Xtensa processors are 32-bit RISC machines designed by Tensilica
	  primarily for embedded systems.  These processors are both
@@ -31,7 +33,7 @@ config GENERIC_HWEIGHT
	def_bool y

config GENERIC_GPIO
	def_bool y
	bool

config ARCH_HAS_ILOG2_U32
	def_bool n
@@ -71,6 +73,12 @@ config XTENSA_VARIANT_DC232B
	help
	  This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).

config XTENSA_VARIANT_DC233C
	bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
	select MMU
	help
	  This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).

config XTENSA_VARIANT_S6000
	bool "s6000 - Stretch software configurable processor"
	select VARIANT_IRQ_SWITCH
@@ -197,6 +205,42 @@ config BUILTIN_DTB
	string "DTB to build into the kernel image"
	depends on OF

config BLK_DEV_SIMDISK
	tristate "Host file-based simulated block device support"
	default n
	depends on XTENSA_PLATFORM_ISS
	help
	  Create block devices that map to files in the host file system.
	  Device binding to host file may be changed at runtime via proc
	  interface provided the device is not in use.

config BLK_DEV_SIMDISK_COUNT
	int "Number of host file-based simulated block devices"
	range 1 10
	depends on BLK_DEV_SIMDISK
	default 2
	help
	  This is the default minimal number of created block devices.
	  Kernel/module parameter 'simdisk_count' may be used to change this
	  value at runtime. More file names (but no more than 10) may be
	  specified as parameters, simdisk_count grows accordingly.

config SIMDISK0_FILENAME
	string "Host filename for the first simulated device"
	depends on BLK_DEV_SIMDISK = y
	default ""
	help
	  Attach a first simdisk to a host file. Conventionally, this file
	  contains a root file system.

config SIMDISK1_FILENAME
	string "Host filename for the second simulated device"
	depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
	default ""
	help
	  Another simulated disk in a host file for a buildroot-independent
	  storage.

source "mm/Kconfig"

source "drivers/pcmcia/Kconfig"
+4 −2
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@

variant-$(CONFIG_XTENSA_VARIANT_FSF)		:= fsf
variant-$(CONFIG_XTENSA_VARIANT_DC232B)		:= dc232b
variant-$(CONFIG_XTENSA_VARIANT_DC233C)		:= dc233c
variant-$(CONFIG_XTENSA_VARIANT_S6000)		:= s6000
variant-$(CONFIG_XTENSA_VARIANT_LINUX_CUSTOM)	:= custom

@@ -86,9 +87,10 @@ core-y += arch/xtensa/kernel/ arch/xtensa/mm/
core-y		+= $(buildvar) $(buildplf)

libs-y		+= arch/xtensa/lib/ $(LIBGCC)
drivers-$(CONFIG_OPROFILE)	+= arch/xtensa/oprofile/

ifneq ($(CONFIG_BUILTIN_DTB),"")
core-$(CONFIG_OF) += arch/xtensa/boot/
core-$(CONFIG_OF) += arch/xtensa/boot/dts/
endif

boot		:= arch/xtensa/boot
@@ -101,7 +103,7 @@ zImage: vmlinux
	$(Q)$(MAKE) $(build)=$(boot) $@

%.dtb:
	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
	$(Q)$(MAKE) $(build)=$(boot)/dts $(boot)/dts/$@

define archhelp
  @echo '* zImage      - Compressed kernel image (arch/xtensa/boot/images/zImage.*)'
+0 −12
Original line number Diff line number Diff line
@@ -25,18 +25,6 @@ bootdir-$(CONFIG_XTENSA_PLATFORM_ISS) += boot-elf
bootdir-$(CONFIG_XTENSA_PLATFORM_XT2000) += boot-redboot boot-elf boot-uboot
bootdir-$(CONFIG_XTENSA_PLATFORM_XTFPGA) += boot-redboot boot-elf boot-uboot


BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB)).dtb.o
ifneq ($(CONFIG_BUILTIN_DTB),"")
obj-$(CONFIG_OF) += $(BUILTIN_DTB)
endif

# Rule to build device tree blobs
$(obj)/%.dtb: $(src)/dts/%.dts FORCE
	$(call if_changed_dep,dtc)

clean-files := *.dtb.S

zImage Image: $(bootdir-y)

$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
+15 −0
Original line number Diff line number Diff line
#
# arch/xtensa/boot/dts/Makefile
#
# This file is subject to the terms and conditions of the GNU General Public
# License.  See the file "COPYING" in the main directory of this archive
# for more details.
#
#

BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB)).dtb.o
ifneq ($(CONFIG_BUILTIN_DTB),"")
obj-$(CONFIG_OF) += $(BUILTIN_DTB)
endif

clean-files := *.dtb.S
+3 −3
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2005 Tensilica Inc.
 * Copyright (C) 2001 - 2008 Tensilica Inc.
 */

#ifndef _XTENSA_ATOMIC_H
@@ -24,11 +24,11 @@

/*
 * This Xtensa implementation assumes that the right mechanism
 * for exclusion is for locking interrupts to level 1.
 * for exclusion is for locking interrupts to level EXCM_LEVEL.
 *
 * Locking interrupts looks like this:
 *
 *    rsil a15, 1
 *    rsil a15, LOCKLEVEL
 *    <code>
 *    wsr  a15, PS
 *    rsync
Loading