Loading drivers/tty/serial/msm_geni_serial.c +4 −4 Original line number Diff line number Diff line Loading @@ -1365,14 +1365,14 @@ static void start_rx_sequencer(struct uart_port *uport) msm_geni_serial_stop_rx(uport); } /* Start RX with the RFR_OPEN to keep RFR in always ready state */ msm_geni_serial_enable_interrupts(uport); geni_setup_s_cmd(uport->membase, UART_START_READ, geni_se_param); if (port->xfer_mode == SE_DMA) geni_se_rx_dma_start(uport->membase, DMA_RX_BUF_SIZE, &port->rx_dma); /* Start RX with the RFR_OPEN to keep RFR in always ready state */ geni_setup_s_cmd(uport->membase, UART_START_READ, geni_se_param); msm_geni_serial_enable_interrupts(uport); /* Ensure that the above writes go through */ mb(); geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); Loading Loading
drivers/tty/serial/msm_geni_serial.c +4 −4 Original line number Diff line number Diff line Loading @@ -1365,14 +1365,14 @@ static void start_rx_sequencer(struct uart_port *uport) msm_geni_serial_stop_rx(uport); } /* Start RX with the RFR_OPEN to keep RFR in always ready state */ msm_geni_serial_enable_interrupts(uport); geni_setup_s_cmd(uport->membase, UART_START_READ, geni_se_param); if (port->xfer_mode == SE_DMA) geni_se_rx_dma_start(uport->membase, DMA_RX_BUF_SIZE, &port->rx_dma); /* Start RX with the RFR_OPEN to keep RFR in always ready state */ geni_setup_s_cmd(uport->membase, UART_START_READ, geni_se_param); msm_geni_serial_enable_interrupts(uport); /* Ensure that the above writes go through */ mb(); geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); Loading