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Commit 94baf025 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
Browse files

staging: comedi: ni_tio_internal.h: replace NITIO_Gi_Interrupt_Enable_Reg() 



The "Interrupt Enable" registers are sequential in the enum ni_gpct_register.
Replace this inline CamelCase function with a simple define.

Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c9d766d0

drivers/staging/comedi/drivers/ni_tio.c

+1 −1
Original line number Diff line number Diff line
@@ -416,7 +416,7 @@ void ni_tio_init_counter(struct ni_gpct *counter) 
			NITIO_DMA_CFG_REG(counter->counter_index), ~0,

			0x0);

	ni_tio_set_bits(counter,

			NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index),

			NITIO_INT_ENA_REG(counter->counter_index),

			~0, 0x0);

}

EXPORT_SYMBOL_GPL(ni_tio_init_counter);

drivers/staging/comedi/drivers/ni_tio_internal.h

+1 −15
Original line number Diff line number Diff line
@@ -39,21 +39,7 @@ 
#define NITIO_ABZ_REG(x)		(NITIO_G0_ABZ + (x))

#define NITIO_INT_ACK_REG(x)		(NITIO_G0_INT_ACK + (x))

#define NITIO_STATUS_REG(x)		(NITIO_G0_STATUS + (x))



static inline enum ni_gpct_register NITIO_Gi_Interrupt_Enable_Reg(unsigned idx)

{

	switch (idx) {

	case 0:

		return NITIO_G0_INT_ENA;

	case 1:

		return NITIO_G1_INT_ENA;

	case 2:

		return NITIO_G2_INT_ENA;

	case 3:

		return NITIO_G3_INT_ENA;

	}

	return 0;

}

#define NITIO_INT_ENA_REG(x)		(NITIO_G0_INT_ENA + (x))



enum Gi_Auto_Increment_Reg_Bits {

	Gi_Auto_Increment_Mask = 0xff

drivers/staging/comedi/drivers/ni_tiocmd.c

+2 −2
Original line number Diff line number Diff line
@@ -200,7 +200,7 @@ static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async) 
		retval = ni_tio_set_gate_src(counter, 0, gate_source);

	if (cmd->flags & TRIG_WAKE_EOS) {

		ni_tio_set_bits(counter,

				NITIO_Gi_Interrupt_Enable_Reg(counter->

				NITIO_INT_ENA_REG(counter->

							      counter_index),

				Gi_Gate_Interrupt_Enable_Bit(counter->

							     counter_index),
@@ -311,7 +311,7 @@ int ni_tio_cancel(struct ni_gpct *counter) 
	ni_tio_configure_dma(counter, 0, 0);



	ni_tio_set_bits(counter,

			NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index),

			NITIO_INT_ENA_REG(counter->counter_index),

			Gi_Gate_Interrupt_Enable_Bit(counter->counter_index),

			0x0);

	return 0;