Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 944483d0 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'next/fixes-non-critical' into next/soc 



This resolves a nontrivial conflict against a bug fix
in another branch.

Conflicts:
	arch/arm/mach-exynos/pm.c

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 03eea7cd fd9f5edf

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -1364,6 +1364,7 @@ F: drivers/pinctrl/pinctrl-st.c 
F:	drivers/media/rc/st_rc.c

F:	drivers/i2c/busses/i2c-st.c

F:	drivers/tty/serial/st-asc.c

F:	drivers/mmc/host/sdhci-st.c



ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT

M:	Lennert Buytenhek <kernel@wantstofly.org>

arch/arm/boot/dts/omap5.dtsi

+60 −0
Original line number Diff line number Diff line
@@ -987,6 +987,66 @@ 
				dma-names = "audio_tx";

			};

		};



		abb_mpu: regulator-abb-mpu {

			compatible = "ti,abb-v2";

			regulator-name = "abb_mpu";

			#address-cells = <0>;

			#size-cells = <0>;

			clocks = <&sys_clkin>;

			ti,settling-time = <50>;

			ti,clock-cycles = <16>;



			reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>,

			      <0x4a0021c4 0x8>, <0x4ae0c318 0x4>;

			reg-names = "base-address", "int-address",

				    "efuse-address", "ldo-address";

			ti,tranxdone-status-mask = <0x80>;

			/* LDOVBBMPU_MUX_CTRL */

			ti,ldovbb-override-mask = <0x400>;

			/* LDOVBBMPU_VSET_OUT */

			ti,ldovbb-vset-mask = <0x1F>;



			/*

			 * NOTE: only FBB mode used but actual vset will

			 * determine final biasing

			 */

			ti,abb_info = <

			/*uV		ABB	efuse	rbb_m fbb_m	vset_m*/

			1060000		0	0x0	0 0x02000000 0x01F00000

			1250000		0	0x4	0 0x02000000 0x01F00000

			>;

		};



		abb_mm: regulator-abb-mm {

			compatible = "ti,abb-v2";

			regulator-name = "abb_mm";

			#address-cells = <0>;

			#size-cells = <0>;

			clocks = <&sys_clkin>;

			ti,settling-time = <50>;

			ti,clock-cycles = <16>;



			reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>,

			      <0x4a0021a4 0x8>, <0x4ae0c314 0x4>;

			reg-names = "base-address", "int-address",

				    "efuse-address", "ldo-address";

			ti,tranxdone-status-mask = <0x80000000>;

			/* LDOVBBMM_MUX_CTRL */

			ti,ldovbb-override-mask = <0x400>;

			/* LDOVBBMM_VSET_OUT */

			ti,ldovbb-vset-mask = <0x1F>;



			/*

			 * NOTE: only FBB mode used but actual vset will

			 * determine final biasing

			 */

			ti,abb_info = <

			/*uV		ABB	efuse	rbb_m fbb_m	vset_m*/

			1025000		0	0x0	0 0x02000000 0x01F00000

			1120000		0	0x4	0 0x02000000 0x01F00000

			>;

		};

	};

};

arch/arm/mach-exynos/platsmp.c

+66 −0
Original line number Diff line number Diff line
@@ -33,6 +33,72 @@ 


extern void exynos4_secondary_startup(void);



/**

 * exynos_core_power_down : power down the specified cpu

 * @cpu : the cpu to power down

 *

 * Power down the specified cpu. The sequence must be finished by a

 * call to cpu_do_idle()

 *

 */

void exynos_cpu_power_down(int cpu)

{

	pmu_raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));

}



/**

 * exynos_cpu_power_up : power up the specified cpu

 * @cpu : the cpu to power up

 *

 * Power up the specified cpu

 */

void exynos_cpu_power_up(int cpu)

{

	pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN,

			EXYNOS_ARM_CORE_CONFIGURATION(cpu));

}



/**

 * exynos_cpu_power_state : returns the power state of the cpu

 * @cpu : the cpu to retrieve the power state from

 *

 */

int exynos_cpu_power_state(int cpu)

{

	return (pmu_raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) &

			S5P_CORE_LOCAL_PWR_EN);

}



/**

 * exynos_cluster_power_down : power down the specified cluster

 * @cluster : the cluster to power down

 */

void exynos_cluster_power_down(int cluster)

{

	pmu_raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster));

}



/**

 * exynos_cluster_power_up : power up the specified cluster

 * @cluster : the cluster to power up

 */

void exynos_cluster_power_up(int cluster)

{

	pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN,

			EXYNOS_COMMON_CONFIGURATION(cluster));

}



/**

 * exynos_cluster_power_state : returns the power state of the cluster

 * @cluster : the cluster to retrieve the power state from

 *

 */

int exynos_cluster_power_state(int cluster)

{

	return (pmu_raw_readl(EXYNOS_COMMON_STATUS(cluster)) &

		S5P_CORE_LOCAL_PWR_EN);

}



static inline void __iomem *cpu_boot_reg_base(void)

{

	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)

arch/arm/mach-exynos/pm.c

+0 −66
Original line number Diff line number Diff line
@@ -100,72 +100,6 @@ static int exynos_irq_set_wake(struct irq_data *data, unsigned int state) 
	return -ENOENT;

}



/**

 * exynos_core_power_down : power down the specified cpu

 * @cpu : the cpu to power down

 *

 * Power down the specified cpu. The sequence must be finished by a

 * call to cpu_do_idle()

 *

 */

void exynos_cpu_power_down(int cpu)

{

	pmu_raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));

}



/**

 * exynos_cpu_power_up : power up the specified cpu

 * @cpu : the cpu to power up

 *

 * Power up the specified cpu

 */

void exynos_cpu_power_up(int cpu)

{

	pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN,

			EXYNOS_ARM_CORE_CONFIGURATION(cpu));

}



/**

 * exynos_cpu_power_state : returns the power state of the cpu

 * @cpu : the cpu to retrieve the power state from

 *

 */

int exynos_cpu_power_state(int cpu)

{

	return (pmu_raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) &

			S5P_CORE_LOCAL_PWR_EN);

}



/**

 * exynos_cluster_power_down : power down the specified cluster

 * @cluster : the cluster to power down

 */

void exynos_cluster_power_down(int cluster)

{

	pmu_raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster));

}



/**

 * exynos_cluster_power_up : power up the specified cluster

 * @cluster : the cluster to power up

 */

void exynos_cluster_power_up(int cluster)

{

	pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN,

			EXYNOS_COMMON_CONFIGURATION(cluster));

}



/**

 * exynos_cluster_power_state : returns the power state of the cluster

 * @cluster : the cluster to retrieve the power state from

 *

 */

int exynos_cluster_power_state(int cluster)

{

	return (pmu_raw_readl(EXYNOS_COMMON_STATUS(cluster)) &

			S5P_CORE_LOCAL_PWR_EN);

}



#define EXYNOS_BOOT_VECTOR_ADDR	(samsung_rev() == EXYNOS4210_REV_1_1 ? \

			pmu_base_addr + S5P_INFORM7 : \

			(samsung_rev() == EXYNOS4210_REV_1_0 ? \

arch/arm/mach-omap1/ocpi.c

+0 −1
Original line number Diff line number Diff line
@@ -55,7 +55,6 @@ static struct clk *ocpi_ck; 


/*

 * Enables device access to OMAP buses via the OCPI bridge

 * FIXME: Add locking

 */

int ocpi_enable(void)

{